A variable output voltage switched-capacitor DC-DC converter with pulse density andwidth modulation (PDWM) for 57% ripple reduction at low output voltage

Xin Zhang*, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Takayasu Sakurai, Makoto Takamiya

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

In this paper, a novel switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) is proposed with reduced output ripple at variable output voltages. While performing pulse density modulation (PDM), the proposed PDWM modulates the pulse width at the same time to reduce the output ripple with high power efficiency. The prototype chip was implemented using 65 nm CMOS process. The switched-capacitor DC-DC converter has 0.2-V to 0.47-V output voltage and delivers 0.25-mA to 10-mA output current from a 1-V input supply with a peak efficiency of 87%. Compared with the conventional PDM scheme, the proposed switched-capacitor DC-DC converter with PDWM reduces the output ripple by 57% in the low output voltage region with the efficiency penalty of 2%.

Original languageEnglish
Pages (from-to)953-959
Number of pages7
JournalIEICE Transactions on Electronics
VolumeE94-C
Issue number6
DOIs
StatePublished - Jun 2011

Keywords

  • DC-DC converter
  • Low ripple
  • Low voltage
  • Pulse density modulation
  • Pulse width modulation
  • Switched-capacitor

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