A unified processor architecture for RISC & VLIW DSP

Tay Jyi Lin*, Chie Min Chao, Chia Hsien Liu, Pi Chen Hsiao, Shin Kai Chen, Li Chun Lin, Chih-Wei Liu, Chein Wei Jen

*Corresponding author for this work

    Research output: Contribution to conference › Paper › peer-review

    10 Scopus citations

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    Computer Science