A unified model for partial-depletion and full-depletion SOI circuit designs: Using BSIMPD as a foundation

Pin Su; Samuel K.H. Fung; Peter W. Wyatt; Hui Wan; Mansun Chan; Ali M. Niknejad; Chen-Ming Hu

doi:10.1109/CICC.2003.1249395

A unified model for partial-depletion and full-depletion SOI circuit designs: Using BSIMPD as a foundation

Pin Su^*, Samuel K.H. Fung, Peter W. Wyatt, Hui Wan, Mansun Chan, Ali M. Niknejad, Chen-Ming Hu

^*Corresponding author for this work

International College of Semiconductor Technology

Research output: Contribution to journal › Conference article › peer-review

21 Scopus citations

Abstract

We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.

Original language	English
Pages (from-to)	241-244
Number of pages	4
Journal	Proceedings of the Custom Integrated Circuits Conference
DOIs	https://doi.org/10.1109/CICC.2003.1249395
State	Published - 2003
Event	Proceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States Duration: 21 Sep 2003 → 24 Sep 2003

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title = "A unified model for partial-depletion and full-depletion SOI circuit designs: Using BSIMPD as a foundation",

abstract = "We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.",

author = "Pin Su and Fung, \{Samuel K.H.\} and Wyatt, \{Peter W.\} and Hui Wan and Mansun Chan and Niknejad, \{Ali M.\} and Chen-Ming Hu",

year = "2003",

doi = "10.1109/CICC.2003.1249395",

language = "English",

pages = "241--244",

journal = "Proceedings of the Custom Integrated Circuits Conference",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the IEEE 2003 Custom Integrated Circuits Conference ; Conference date: 21-09-2003 Through 24-09-2003",

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T1 - A unified model for partial-depletion and full-depletion SOI circuit designs

T2 - Proceedings of the IEEE 2003 Custom Integrated Circuits Conference

AU - Su, Pin

AU - Fung, Samuel K.H.

AU - Wyatt, Peter W.

AU - Wan, Hui

AU - Chan, Mansun

AU - Niknejad, Ali M.

AU - Hu, Chen-Ming

PY - 2003

Y1 - 2003

N2 - We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.

AB - We present our approach to developing a unified SOI MOSFET model for circuit designs using state-of-the-art SOI technologies. Using BSIMPD as a foundation, we unify the PD and FD models by the concept of body-source built-in potential lowering. This unification is crucial due to the coexistence of PD/FD devices in a single chip as well as the coexistence of PD/FD behavior in a single device. The unified BSIMSOI model has been implemented in Berkeley SPICE3f4 and many commercial circuit simulators.

UR - https://www.scopus.com/pages/publications/0242527294

U2 - 10.1109/CICC.2003.1249395

DO - 10.1109/CICC.2003.1249395

M3 - Conference article

AN - SCOPUS:0242527294

SN - 0886-5930

SP - 241

EP - 244

JO - Proceedings of the Custom Integrated Circuits Conference

JF - Proceedings of the Custom Integrated Circuits Conference

Y2 - 21 September 2003 through 24 September 2003

ER -

A unified model for partial-depletion and full-depletion SOI circuit designs: Using BSIMPD as a foundation

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