A threshold-embedded offset calibration technique for folding flash ADCs

Tzu Yi Tang, Jhao Wei Zeng, Kevin Chen, Tsung Heng Tsai*

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

A threshold-embedded offset calibration technique for inverter-based analog-to-digital converter (ADC) is presented. This work presents a background calibration technique for trimming the input-referred offsets of the comparators without interrupting the ADC's normal operation. Moreover, a folding flash architecture is employed to save the conversion power. The proposed calibration approach is based on the time-domain comparison. The random input-referred offsets of the comparators are converted to phase difference and detected by time-domain comparators. Simulation results show that the proposed compensation technique is validated. After calibration, the effective number of bits (ENOB) can be significantly improved from 3.4 bit to 5.7 bit.

Original languageEnglish
Pages25-28
Number of pages4
DOIs
StatePublished - 2013
Event2013 IEEE International Symposium on Next-Generation Electronics, ISNE 2013 - Kaohsiung, Taiwan
Duration: 25 Feb 201326 Feb 2013

Conference

Conference2013 IEEE International Symposium on Next-Generation Electronics, ISNE 2013
Country/TerritoryTaiwan
CityKaohsiung
Period25/02/1326/02/13

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