A spur-reduction frequency synthesizer for WIMAX applications

De Wen Liao*, Chung-Chih Hung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

A spur-reduction frequency synthesizer proposed in 0.18-um CMOS technology is developed for WIMAX applications. It incorporates a random charge pump to randomize the reference spur so as to accomplish a low spur level or a relatively smooth spectrum and a fast lock synthesizer. This frequency synthesizer achieves the phase noise of -124dBc/Hz at 1MHz offset frequency and reference spurs below -70dBc. The spur tones of the frequency synthesizer are greatly in frequency domain and the power consumption is 28mW.

Original languageEnglish
Title of host publicationISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems
Subtitle of host publicationNano-Bio Circuit Fabrics and Systems
Pages2594-2597
Number of pages4
DOIs
StatePublished - 31 Aug 2010
Event2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris, France
Duration: 30 May 20102 Jun 2010

Publication series

NameISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems

Conference

Conference2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010
Country/TerritoryFrance
CityParis
Period30/05/102/06/10

Keywords

  • PLL
  • Synthesizer
  • VCO

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