TY - GEN
T1 - A simulation-based hybrid optimization technique for low noise amplifier design automation
AU - Li, Yi-Ming
AU - Yu, Shao Ming
AU - Li, Yih Lang
PY - 2007
Y1 - 2007
N2 - In this paper, a simulation-based optimization technique for integrated circuit (IC) design automation is presented. Based on a genetic algorithm (GA), Levenberg-Marquardt (LM) method, and circuit simulator, a window-interfaced prototype of computer-aided design (CAD) is developed for IC design. Considering low noise amplifier (LNA) IC, we simultaneously evaluate specifications including S parameters, K factor, noise figure, and input third-order intercept point in the optimization process. If the simulated results meet the aforementioned constraints, the prototype outputs the optimized parameters. Otherwise, CAD activates GA for global optimization; simultaneously, LM method searches solutions with the results of GA. The prototype then calls a circuit simulator to compute and evaluate newer results until all specifications are matched. More than fifteen parameters including device sizes, passive components, and biasing conditions are optimized for the aforementioned constraints. For LNA IC with 0.18pm metal-oxide-silicon filed effect transistors, benchmark results confirm the functionality of the implemented prototype.
AB - In this paper, a simulation-based optimization technique for integrated circuit (IC) design automation is presented. Based on a genetic algorithm (GA), Levenberg-Marquardt (LM) method, and circuit simulator, a window-interfaced prototype of computer-aided design (CAD) is developed for IC design. Considering low noise amplifier (LNA) IC, we simultaneously evaluate specifications including S parameters, K factor, noise figure, and input third-order intercept point in the optimization process. If the simulated results meet the aforementioned constraints, the prototype outputs the optimized parameters. Otherwise, CAD activates GA for global optimization; simultaneously, LM method searches solutions with the results of GA. The prototype then calls a circuit simulator to compute and evaluate newer results until all specifications are matched. More than fifteen parameters including device sizes, passive components, and biasing conditions are optimized for the aforementioned constraints. For LNA IC with 0.18pm metal-oxide-silicon filed effect transistors, benchmark results confirm the functionality of the implemented prototype.
KW - Circuit design
KW - Computational performance
KW - DaCO
KW - LNA
KW - Optimization
KW - Parameter tuning
UR - http://www.scopus.com/inward/record.url?scp=38149052303&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-72590-9_37
DO - 10.1007/978-3-540-72590-9_37
M3 - Conference contribution
AN - SCOPUS:38149052303
SN - 9783540725893
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 259
EP - 266
BT - Computational Science - ICCS 2007 - 7th International Conference, Proceedings
PB - Springer Verlag
T2 - 7th International Conference on Computational Science, ICCS 2007
Y2 - 27 May 2007 through 30 May 2007
ER -