A serial link transceiver for USB2 high-speed mode

Shyh-Jye Jou; Shu Hua Kuo; Jui Ta Chiu; Chu King; Chien Hsiung Lee; Tim Liu

doi:10.1109/ISCAS.2001.922172

A serial link transceiver for USB2 high-speed mode

Shyh-Jye Jou, Shu Hua Kuo, Jui Ta Chiu, Chu King, Chien Hsiung Lee, Tim Liu

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 /spl mu/m 1P4M 3.3 V CMOS technology and consumes only 156 mW.

Original language	English
Title of host publication	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages	72-75
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2001.922172
State	Published - 1 Dec 2001
Event	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia Duration: 6 May 2001 → 9 May 2001

Publication series

Name	ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Volume	4

Conference

Conference	2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
Country/Territory	Australia
City	Sydney, NSW
Period	6/05/01 → 9/05/01

Access to Document

10.1109/ISCAS.2001.922172

Cite this

Jou, S.-J., Kuo, S. H., Chiu, J. T., King, C., Lee, C. H., & Liu, T. (2001). A serial link transceiver for USB2 high-speed mode. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (pp. 72-75). Article 922172 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 4). https://doi.org/10.1109/ISCAS.2001.922172

@inproceedings{9f92344d75434f0dbf0a36165a705599,

title = "A serial link transceiver for USB2 high-speed mode",

abstract = "The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 /spl mu/m 1P4M 3.3 V CMOS technology and consumes only 156 mW.",

author = "Shyh-Jye Jou and Kuo, {Shu Hua} and Chiu, {Jui Ta} and Chu King and Lee, {Chien Hsiung} and Tim Liu",

year = "2001",

month = dec,

day = "1",

doi = "10.1109/ISCAS.2001.922172",

language = "English",

isbn = "0780366859",

series = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

pages = "72--75",

booktitle = "ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings",

note = "2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 ; Conference date: 06-05-2001 Through 09-05-2001",

}

Jou, S-J, Kuo, SH, Chiu, JT, King, C, Lee, CH & Liu, T 2001, A serial link transceiver for USB2 high-speed mode. in ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings., 922172, ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings, vol. 4, pp. 72-75, 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001, Sydney, NSW, Australia, 6/05/01. https://doi.org/10.1109/ISCAS.2001.922172

A serial link transceiver for USB2 high-speed mode. / Jou, Shyh-Jye; Kuo, Shu Hua; Chiu, Jui Ta et al.
ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings. 2001. p. 72-75 922172 (ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings; Vol. 4).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 /spl mu/m 1P4M 3.3 V CMOS technology and consumes only 156 mW.

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T2 - 2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001

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A serial link transceiver for USB2 high-speed mode

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