A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

Brian Zimmer; Yunsup Lee; Alberto Puggelli; Jaehwa Kwak; Ruzica Jevtić; Ben Keller; Steven Bailey; Milovan Blagojević; Pi Feng Chiu; Hanh Phuc Le; Po-Hung Chen; Nicholas Sutardja; Rimas Avizienis; Andrew Waterman; Brian Richards; Philippe Flatresse; Elad Alon; Krste Asanović; Borivoje Nikolić

doi:10.1109/JSSC.2016.2519386

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtić, Ben Keller, Steven Bailey, Milovan Blagojević, Pi Feng Chiu, Hanh Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian Richards, Philippe Flatresse, Elad Alon, Krste Asanović, Borivoje Nikolić

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

57 Scopus citations

Abstract

This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices.

Original language	English
Article number	7422720
Pages (from-to)	930-942
Number of pages	13
Journal	IEEE Journal of Solid-State Circuits
Volume	51
Issue number	4
DOIs	https://doi.org/10.1109/JSSC.2016.2519386
State	Published - Apr 2016

Keywords

Adaptive clock
DC-DC conversion
RISC-V
dynamic voltage and frequency scaling (DVFS)
fully integrated converter
integrated voltage regulator
noninterleaved
simultaneous-switching
switched-capacitor

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/JSSC.2016.2519386

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Zimmer, B., Lee, Y., Puggelli, A., Kwak, J., Jevtić, R., Keller, B., Bailey, S., Blagojević, M., Chiu, P. F., Le, H. P., Chen, P.-H., Sutardja, N., Avizienis, R., Waterman, A., Richards, B., Flatresse, P., Alon, E., Asanović, K., & Nikolić, B. (2016). A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE Journal of Solid-State Circuits, 51(4), 930-942. Article 7422720. https://doi.org/10.1109/JSSC.2016.2519386

@article{504010729da84770a615e3b728b96393,

title = "A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI",

abstract = "This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices.",

keywords = "Adaptive clock, DC-DC conversion, RISC-V, dynamic voltage and frequency scaling (DVFS), fully integrated converter, integrated voltage regulator, noninterleaved, simultaneous-switching, switched-capacitor",

author = "Brian Zimmer and Yunsup Lee and Alberto Puggelli and Jaehwa Kwak and Ruzica Jevti{\'c} and Ben Keller and Steven Bailey and Milovan Blagojevi{\'c} and Chiu, {Pi Feng} and Le, {Hanh Phuc} and Po-Hung Chen and Nicholas Sutardja and Rimas Avizienis and Andrew Waterman and Brian Richards and Philippe Flatresse and Elad Alon and Krste Asanovi{\'c} and Borivoje Nikoli{\'c}",

note = "Publisher Copyright: {\textcopyright} 2016 IEEE.",

year = "2016",

month = apr,

doi = "10.1109/JSSC.2016.2519386",

language = "English",

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Zimmer, B, Lee, Y, Puggelli, A, Kwak, J, Jevtić, R, Keller, B, Bailey, S, Blagojević, M, Chiu, PF, Le, HP, Chen, P-H, Sutardja, N, Avizienis, R, Waterman, A, Richards, B, Flatresse, P, Alon, E, Asanović, K & Nikolić, B 2016, 'A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI', IEEE Journal of Solid-State Circuits, vol. 51, no. 4, 7422720, pp. 930-942. https://doi.org/10.1109/JSSC.2016.2519386

TY - JOUR

T1 - A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

AU - Zimmer, Brian

AU - Lee, Yunsup

AU - Puggelli, Alberto

AU - Kwak, Jaehwa

AU - Jevtić, Ruzica

AU - Keller, Ben

AU - Bailey, Steven

AU - Blagojević, Milovan

AU - Chiu, Pi Feng

AU - Le, Hanh Phuc

AU - Chen, Po-Hung

AU - Sutardja, Nicholas

AU - Avizienis, Rimas

AU - Waterman, Andrew

AU - Richards, Brian

AU - Flatresse, Philippe

AU - Alon, Elad

AU - Asanović, Krste

AU - Nikolić, Borivoje

PY - 2016/4

Y1 - 2016/4

N2 - This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices.

AB - This work demonstrates a RISC-V vector microprocessor implemented in 28 nm FDSOI with fully integrated simultaneous-switching switched-capacitor DC-DC (SC DC-DC) converters and adaptive clocking that generates four on-chip voltages between 0.45 and 1 V using only 1.0 V core and 1.8 V IO voltage inputs. The converters achieve high efficiency at the system level by switching simultaneously to avoid charge-sharing losses and by using an adaptive clock to maximize performance for the resulting voltage ripple. Details about the implementation of the DC-DC switches, DC-DC controller, and adaptive clock are provided, and the sources of conversion loss are analyzed based on measured results. This system pushes the capabilities of dynamic voltage scaling by enabling fast transitions (20 ns), simple packaging (no off-chip passives), low area overhead (16%), high conversion efficiency (80%-86%), and high energy efficiency (26.2 DP GFLOPS/W) for mobile devices.

KW - Adaptive clock

KW - DC-DC conversion

KW - RISC-V

KW - dynamic voltage and frequency scaling (DVFS)

KW - fully integrated converter

KW - integrated voltage regulator

KW - noninterleaved

KW - simultaneous-switching

KW - switched-capacitor

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U2 - 10.1109/JSSC.2016.2519386

DO - 10.1109/JSSC.2016.2519386

M3 - Article

AN - SCOPUS:84960193908

SN - 0018-9200

VL - 51

SP - 930

EP - 942

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 4

M1 - 7422720

ER -

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

Abstract

Keywords

UN SDGs

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