A resolution-reconfigurable asynchronous SAR ADC with segmented and non-binary weighted capacitance DACs

Chih Hsuan Lin*, Kuei Ann Wen

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    Abstract

    With the addition of thing of internet applications to 5G smartphones, mobile standby time and ultra-low-power sensing systems have become increasingly important. Nowadays, such sensing systems typically reduce power consumption to microwatts. This paper presents segmented and non-binary weighted capacitance DACs, low power, high resolution, an asynchronous clock, a spark-detect, vcm-based switching and direct switching, and reconfigurable 9- to 12-bit DACs to meet different sensing system applications. Multivoltage is used to achieve microwatt-level power consumption. The analog/digit voltage is 1.5V/0.9V, respectively and can adjust the 4-mode resolutions (9/10/11/12 bits). The performance of the SNDR achieves 50.78, 58.53, 62.42, and 66.51db, respectively and consumes 2.69uW and results in a figure of merit (FoM) of 30.4fJ/conversion step for 12-bit mode.

    Original languageEnglish
    Pages (from-to)665-672
    Number of pages8
    JournalAdvances in Science, Technology and Engineering Systems
    Volume5
    Issue number2
    DOIs
    StatePublished - Apr 2020

    Keywords

    • Asynchronous SAR ADC
    • Resolution-reconfigurable
    • Segmented and non-binary
    • Weighted

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