TY - GEN
T1 - A reliable brain computer interface implemented on an FPGA for a mobile dialing system
AU - Feng, Chih Wei
AU - Hu, Ting Kuei
AU - Chang, Jui Chung
AU - Fang, Wai-Chi
PY - 2014
Y1 - 2014
N2 - This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed EEG system has been implemented in Field-Programmable Gate Arrays (FPGA), and shows high accuracy, high integration density, and low cost. These features are meaningful for implementing a real-time SSVEP-based BCI.
AB - This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six frequency bands (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose a phone number by gazing at the display interface. This proposed EEG system has been implemented in Field-Programmable Gate Arrays (FPGA), and shows high accuracy, high integration density, and low cost. These features are meaningful for implementing a real-time SSVEP-based BCI.
UR - http://www.scopus.com/inward/record.url?scp=84907386102&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2014.6865220
DO - 10.1109/ISCAS.2014.6865220
M3 - Conference contribution
AN - SCOPUS:84907386102
SN - 9781479934324
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 654
EP - 657
BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Y2 - 1 June 2014 through 5 June 2014
ER -