A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fsrmsResolution with Background Self-Calibration

Wei Jhih Jian; Wei Zen Chen

doi:10.1109/VLSITechnologyandCir46769.2022.9830159

A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration

Wei Jhih Jian, Wei Zen Chen

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents an on-chip jitter/phase noise measurement (PNM) circuit, which is reference-free and in-situ background self-calibrated. ?S Time to digital converters (?STDC) are employed to measure cycle jitters of the signal under test, and are capable of digitizing the power spectral density of phase noise. In accordance with the measurement results by using a spectrum analyzer, it demonstrates a jitter resolution of 275 fsrms with only 4.8% error, which is at least 3X finer compared to the prior art.

Original language	English
Title of host publication	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	8-9
Number of pages	2
ISBN (Electronic)	9781665497725
DOIs	https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830159
State	Published - 2022
Event	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 - Honolulu, United States Duration: 12 Jun 2022 → 17 Jun 2022

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
Volume	2022-June
ISSN (Print)	0743-1562

Conference

Conference	2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022
Country/Territory	United States
City	Honolulu
Period	12/06/22 → 17/06/22

Keywords

?S time to digital converters
background self-calibration
phase noise measurement
reference-free and delay-line based frequency discriminator

Access to Document

10.1109/VLSITechnologyandCir46769.2022.9830159

Cite this

Jian, W. J., & Chen, W. Z. (2022). A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022 (pp. 8-9). (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830159

Jian, Wei Jhih ; Chen, Wei Zen. / A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration. 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. pp. 8-9 (Digest of Technical Papers - Symposium on VLSI Technology).

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abstract = "This paper presents an on-chip jitter/phase noise measurement (PNM) circuit, which is reference-free and in-situ background self-calibrated. ?S Time to digital converters (?STDC) are employed to measure cycle jitters of the signal under test, and are capable of digitizing the power spectral density of phase noise. In accordance with the measurement results by using a spectrum analyzer, it demonstrates a jitter resolution of 275 fsrms with only 4.8% error, which is at least 3X finer compared to the prior art.",

keywords = "?S time to digital converters, background self-calibration, phase noise measurement, reference-free and delay-line based frequency discriminator",

author = "Jian, {Wei Jhih} and Chen, {Wei Zen}",

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language = "English",

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Jian, WJ & Chen, WZ 2022, A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration. in 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Digest of Technical Papers - Symposium on VLSI Technology, vol. 2022-June, Institute of Electrical and Electronics Engineers Inc., pp. 8-9, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, Honolulu, United States, 12/06/22. https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830159

A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration. / Jian, Wei Jhih; Chen, Wei Zen.
2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc., 2022. p. 8-9 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2022-June).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Jian WJ, Chen WZ. A Reference-Free Phase Noise Measurement Circuit Achieving 24.2 fs Periodic Jitter Sensitivity and 275 fs_rmsResolution with Background Self-Calibration. In 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022. Institute of Electrical and Electronics Engineers Inc. 2022. p. 8-9. (Digest of Technical Papers - Symposium on VLSI Technology). doi: 10.1109/VLSITechnologyandCir46769.2022.9830159