A reconfigurable MAC architecture implemented with mixed-Vt standard cell library

Li Rong Wang; Yi Wei Chiu; Chia Lin Hu; Ming Hsien Tu; Shyh-Jye Jou; Chung Len Lee

doi:10.1109/ISCAS.2008.4542195

A reconfigurable MAC architecture implemented with mixed-V_t standard cell library

Li Rong Wang^*, Yi Wei Chiu, Chia Lin Hu, Ming Hsien Tu, Shyh-Jye Jou, Chung Len Lee

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

In this paper, a 32-bit reconfigurable multiplication-accumulation architecture, which can execute flexibly one 32x32, two 16x16 or four 8x8 two's complement multiply-accumulation, is proposed and demonstrated. It is based on the modified Booth encoding scheme and designed with techniques of reducing sign-extension bits, removing one extra partial product row and adjusting the positions of hot signals but with elegant modifications. It is implemented with a 130nm mixed-V_t CMOS standard cell library and shows saving of area and power consumption by approximately 16% and 14% respectively as compared to the previous design.

Original language	English
Title of host publication	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages	3426-3429
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2008.4542195
State	Published - 2008
Event	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States Duration: 18 May 2008 → 21 May 2008

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country/Territory	United States
City	Seattle, WA
Period	18/05/08 → 21/05/08

Access to Document

10.1109/ISCAS.2008.4542195

Cite this

Wang, L. R., Chiu, Y. W., Hu, C. L., Tu, M. H., Jou, S.-J., & Lee, C. L. (2008). A reconfigurable MAC architecture implemented with mixed-V_t standard cell library. In 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 (pp. 3426-3429). Article 4542195 (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2008.4542195

@inproceedings{e0f900b62ea54491979036a1f67f5a7c,

title = "A reconfigurable MAC architecture implemented with mixed-Vt standard cell library",

abstract = "In this paper, a 32-bit reconfigurable multiplication-accumulation architecture, which can execute flexibly one 32x32, two 16x16 or four 8x8 two's complement multiply-accumulation, is proposed and demonstrated. It is based on the modified Booth encoding scheme and designed with techniques of reducing sign-extension bits, removing one extra partial product row and adjusting the positions of hot signals but with elegant modifications. It is implemented with a 130nm mixed-Vt CMOS standard cell library and shows saving of area and power consumption by approximately 16% and 14% respectively as compared to the previous design.",

author = "Wang, {Li Rong} and Chiu, {Yi Wei} and Hu, {Chia Lin} and Tu, {Ming Hsien} and Shyh-Jye Jou and Lee, {Chung Len}",

year = "2008",

doi = "10.1109/ISCAS.2008.4542195",

language = "English",

isbn = "9781424416844",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "3426--3429",

booktitle = "2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008",

note = "2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 ; Conference date: 18-05-2008 Through 21-05-2008",

}

Wang, LR, Chiu, YW, Hu, CL, Tu, MH, Jou, S-J & Lee, CL 2008, A reconfigurable MAC architecture implemented with mixed-V_t standard cell library. in 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008., 4542195, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 3426-3429, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United States, 18/05/08. https://doi.org/10.1109/ISCAS.2008.4542195

A reconfigurable MAC architecture implemented with mixed-V_t standard cell library. / Wang, Li Rong; Chiu, Yi Wei; Hu, Chia Lin et al.
2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. 2008. p. 3426-3429 4542195 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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