A power-aware quad-voltage H.264 encoder chip for wireless panoramic endoscope applications

An Tia Xiao, Shiang Ren Yang, Yuan Hsiang Miao, Ching Hwa Cheng, Jiun-In  Guo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Voltage scaling is an efficient way to reduce dynamic power consumption for digital circuits. In this paper, a hierarchical multiple voltage (HMulti-Vdd) technology is proposed to design a power-aware H.264 intra-frame encoder for wireless panoramic endoscope applications. The proposed design adopts quad supply voltages to reduce power consumption without performance degradation. A progressive voltage difference technique is adopted in the proposed design for preventing from the penalty from using level shifters on performance and power consumption. The quad-voltage test chip has been successfully validated and has shown a 40% average reduction of power consumption, as compared to the same design using a single supply voltage.

Original languageEnglish
Title of host publication2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479962754
DOIs
StatePublished - 28 May 2015
Event2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015 - Hsinchu, Taiwan
Duration: 27 Apr 201529 Apr 2015

Publication series

Name2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015

Conference

Conference2015 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2015
Country/TerritoryTaiwan
CityHsinchu
Period27/04/1529/04/15

Keywords

  • H.264 encoder
  • multiple-voltage low power design
  • power-aware design

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