A novel test flow for one-time-programming applications of NROM technology

Chia-Tso Chao*, Ching Yu Chin, Yao Te Tsou, Chi Min Chang

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

The NROM technology is an emerging non-volatile-memory technology providing high data density with low fabrication cost. In this paper, we propose a novel test flow for the one-time-programming (OTP) applications using the NROM bit cells. Unlike the conventional test flow, the proposed flow applies the repair analysis in its package test instead of in its wafer test, and hence creates a chance for reusing the bit cells originally identified as a defect to represent the value in the OTP application. Thus, the proposed test flow can reduce the number of bit cells to be repaired and further improve the yield. Also, we propose an efficient and effective estimation scheme to predict the probability of a part being successfully repaired before packaged. This estimation can be used to determine whether a part should be packaged, such that the total profit of the proposed test flow can be optimized. A series of experiments are conducted to demonstrate the effectiveness, efficiency, and feasibility of the proposed test flow.

Original languageEnglish
Article number5675765
Pages (from-to)2170-2183
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume19
Issue number12
DOIs
StatePublished - 1 Dec 2011

Keywords

  • NROM
  • repair rate estimation
  • test flow

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