A Novel Technology Mapper for Complex Universal Gates

Keyphrases

• Mapper 100%
• Universal Gates 100%
• Basic Standard 50%
• High Flexibility 25%
• VLSI Design 25%
• Dynamic Programming 25%
• Logic Gates 25%
• High Density 25%
• State-of-the-art Technology 25%
• Network Simulation 25%
• Design Requirements 25%
• Combinational Logic 25%
• Mapping Algorithm 25%
• Technology Mapping 25%
• Boolean Networks 25%
• Basic Logic 25%
• Library Construction 25%
• Tightly Coupled Integration 25%
• Cut Enumeration 25%
• Cell Coverings 25%
• Universal Logic Gate 25%
• Boolean Matching 25%
• Optimal Technology 25%
• Universal Cells 25%

Computer Science

• Logic Gate 100%
• Component Table 100%
• Experimental Result 50%
• Dynamic Programming 50%
• Design Requirement 50%
• Network Simulation 50%
• Mapping Algorithm 50%
• Technology Mapping 50%
• Combinational Logic 50%
• Boolean Network 50%
• Tight Integration 50%