TY - JOUR
T1 - A Novel Deep Learning Architecture for Global Defect Classification
T2 - 32nd Annual SEMI Advanced Semiconductor Manufacturing Conference, ASMC 2021
AU - Yang, Yuan Fu
AU - Sun, Min
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - The competition in the semiconductor industry is intense, and any manufacturing company's primary concerns are to reduce costs and improve quality and reliability. By increasing the yield and maximizing the throughput of good wafers, lower costs and higher revenues can be achieved. The ability of defect inspection affects the product yield and productivity. The high rate of false negatives in defect inspection will result in defective wafers being treated as normal wafers and shipped to customers. In addition, a high false positives rate will cause non-defective wafers to be considered abnormal and lead to additional review loading by engineers. Therefore, how to reduce both false negatives and false positives is the main challenge for defect inspection. In this paper, we have developed a new deep learning architecture, named Self-Proliferating Neural Network (SPNet). Compared with other methods, SPNet can significantly reduce false positives and false positives, while improving quality and productivity. We also show that our method generalizes well to other public datasets, where they achieve state-of-the-art results. Finally, we apply SPNet to the classification tasks of defect map and defect pattern, and the F1-score achieves 98.9% and 98.2%, respectively. We conduct experiments that probe the robustness of learned representations and conclude that SPNet has significant benefits in robustness and generalization.
AB - The competition in the semiconductor industry is intense, and any manufacturing company's primary concerns are to reduce costs and improve quality and reliability. By increasing the yield and maximizing the throughput of good wafers, lower costs and higher revenues can be achieved. The ability of defect inspection affects the product yield and productivity. The high rate of false negatives in defect inspection will result in defective wafers being treated as normal wafers and shipped to customers. In addition, a high false positives rate will cause non-defective wafers to be considered abnormal and lead to additional review loading by engineers. Therefore, how to reduce both false negatives and false positives is the main challenge for defect inspection. In this paper, we have developed a new deep learning architecture, named Self-Proliferating Neural Network (SPNet). Compared with other methods, SPNet can significantly reduce false positives and false positives, while improving quality and productivity. We also show that our method generalizes well to other public datasets, where they achieve state-of-the-art results. Finally, we apply SPNet to the classification tasks of defect map and defect pattern, and the F1-score achieves 98.9% and 98.2%, respectively. We conduct experiments that probe the robustness of learned representations and conclude that SPNet has significant benefits in robustness and generalization.
KW - Deep Learning
KW - Defect Map
KW - Defect Pattern
KW - SPNet
UR - http://www.scopus.com/inward/record.url?scp=85125453279&partnerID=8YFLogxK
U2 - 10.1109/ASMC51741.2021.9714125
DO - 10.1109/ASMC51741.2021.9714125
M3 - Conference article
AN - SCOPUS:85125453279
SN - 1078-8743
VL - 2021-January
JO - IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings
JF - IEEE International Symposium on Semiconductor Manufacturing Conference, Proceedings
Y2 - 10 May 2021 through 12 May 2021
ER -