A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process

Shih Lun Chen; Ming-Dou Ker

doi:10.1109/APASIC.2004.1349422

A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process

Shih Lun Chen^*, Ming-Dou Ker

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

7 Scopus citations

Abstract

An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuits in a 0.13-μm 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V PCI-X interface. Besides, a level converter with only 1-V and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.

Original language	English
Title of host publication	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Pages	112-115
Number of pages	4
DOIs	https://doi.org/10.1109/APASIC.2004.1349422
State	Published - 1 Dec 2004
Event	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - Fukuoka, Japan Duration: 4 Aug 2004 → 5 Aug 2004

Publication series

Name	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

Conference

Conference	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Country/Territory	Japan
City	Fukuoka
Period	4/08/04 → 5/08/04

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10.1109/APASIC.2004.1349422

Cite this

@inproceedings{f8a0e598ae044155884f5c84bf3fa026,

title = "A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process",

abstract = "An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuits in a 0.13-μm 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V PCI-X interface. Besides, a level converter with only 1-V and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.",

author = "Chen, {Shih Lun} and Ming-Dou Ker",

year = "2004",

month = dec,

day = "1",

doi = "10.1109/APASIC.2004.1349422",

language = "English",

isbn = "078038637X",

series = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits",

pages = "112--115",

booktitle = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits",

note = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits ; Conference date: 04-08-2004 Through 05-08-2004",

}

Chen, SL & Ker, M-D 2004, A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process. in Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp. 112-115, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, Fukuoka, Japan, 4/08/04. https://doi.org/10.1109/APASIC.2004.1349422

A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process. / Chen, Shih Lun; Ker, Ming-Dou.
Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. 2004. p. 112-115 (Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Chen, Shih Lun

AU - Ker, Ming-Dou

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N2 - An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuits in a 0.13-μm 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V PCI-X interface. Besides, a level converter with only 1-V and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.

AB - An output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications is proposed in this paper. Because PCI-X is a 3.3-V interface, the high-voltage gate-oxide stress is a serious problem to design PCI-X I/O circuits in a 0.13-μm 1/2.5-V CMOS process. The simulation results show that the proposed output buffer can be operated at 133 MHz without causing high-voltage gate-oxide stress problem in the 3.3-V PCI-X interface. Besides, a level converter with only 1-V and 2.5-V devices that can converter 0/1-V voltage swing to 1/3.3-V voltage swing is also proposed in this paper. The testchip to verify this new proposed output buffer is now under fabrication. The measured results will be shown in the presentation.

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BT - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

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A new output buffer for 3.3-V PCI-X application in a 0.13-μm 1/2.5-V CMOS process

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