A New On-Chip ESD Protection Circuit with Dual Parasitic SCR Structures for CMOS VLSI

Keyphrases

• On chip 100%
• Electrostatic Discharge (ESD) Protection 100%
• Protection Circuit 100%
• CMOS VLSI 100%
• CMOS Technology 20%
• Circuit Design 20%
• Electrostatic Discharge 20%
• Resistors 20%
• High-speed Applications 20%
• Trigger Voltage 20%
• Layout Area 20%
• Failure Threshold 20%
• Human Body 20%
• Input Capacitance 20%
• Device Breakdown 20%
• Junction Breakdown 20%
• Mode Testing 20%

Engineering

• Electrostatic Discharge 100%
• Experimental Result 20%
• Circuit Design 20%
• Internals 20%
• Speed Application 20%
• Input Capacitance 20%