A new cryogenic CMOS readout structure for infrared focal plane array

Chih Cheng Hsieh*, Chung-Yu Wu, Tai Ping Sun

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

56 Scopus citations

Abstract

A new current readout structure for the infrared (IR) focal-plane-array (FPA), called the switch-current integration (SCI) structure, is presented in this paper. By applying the share-buffered direct-injection (SBDI) biasing technique and off focal-plane-array (off-FPA) integration capacitor structure, a high-performance readout interface circuit for the IR FPA is realized with a pixel size of 50 × 50 μm2. Moreover, the correlated double sampling (CDS) stage and dynamic discharging output stage are utilized to improve noise and speed performance of the readout structure under low power dissipation. An experimental SCI readout chip has been designed and fabricated in 0.8-μm double-poly-double-metal (DPDM) n-well CMOS technology. The measurement results of the fabricated readout chip at 77 K with 4 and 8 V supply voltages have successfully verified both the readout function and the performance improvement. The fabricated chip has a maximum charge capacity of 1.12 × 108 electrons, a maximum transimpedance of 1 × 109 Ω, and ae active power dissipation of 30 mW. The proposed CMOS SCI structure can be applied to various cryogenic IR FPA's.

Original languageEnglish
Pages (from-to)1192-1199
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Volume32
Issue number8
DOIs
StatePublished - 1 Aug 1997

Keywords

  • CMOS integrated circuit
  • Cryogenic electronics
  • Focal plane array
  • Readout circuit

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