A New Cascode Design with Enhanced Power gain and Bandwidth for Application in mm-Wave Amplifier

Jinq Min Lin, Adhi Cahyo Wijaya, Jyh Chyurn Guo

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, a new cascode, namely dual-gate (DG) MOSFET is designed and fabricated in 40nm CMOS technology to realize smaller area, reduced parasitic RC, and most importantly enhanced power gain up to 140GHz and ultra-wide bandwidth compared to the conventional cascode, aimed at D-band (110~170 GHz) amplifiers design.

Original languageEnglish
Title of host publication2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665409230
DOIs
StatePublished - 2022
Event2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022 - Hsinchu, Taiwan
Duration: 18 Apr 202221 Apr 2022

Publication series

Name2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022

Conference

Conference2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
Country/TerritoryTaiwan
CityHsinchu
Period18/04/2221/04/22

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