TY - GEN
T1 - A New Cascode Design with Enhanced Power gain and Bandwidth for Application in mm-Wave Amplifier
AU - Lin, Jinq Min
AU - Wijaya, Adhi Cahyo
AU - Guo, Jyh Chyurn
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - In this paper, a new cascode, namely dual-gate (DG) MOSFET is designed and fabricated in 40nm CMOS technology to realize smaller area, reduced parasitic RC, and most importantly enhanced power gain up to 140GHz and ultra-wide bandwidth compared to the conventional cascode, aimed at D-band (110~170 GHz) amplifiers design.
AB - In this paper, a new cascode, namely dual-gate (DG) MOSFET is designed and fabricated in 40nm CMOS technology to realize smaller area, reduced parasitic RC, and most importantly enhanced power gain up to 140GHz and ultra-wide bandwidth compared to the conventional cascode, aimed at D-band (110~170 GHz) amplifiers design.
UR - http://www.scopus.com/inward/record.url?scp=85130499381&partnerID=8YFLogxK
U2 - 10.1109/VLSI-TSA54299.2022.9771022
DO - 10.1109/VLSI-TSA54299.2022.9771022
M3 - Conference contribution
AN - SCOPUS:85130499381
T3 - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
BT - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2022
Y2 - 18 April 2022 through 21 April 2022
ER -