TY - GEN
T1 - A Monolithic GaN-Based Driver and GaN Power HEMT with Diode-Emulated GaN Technique for 50MHz Operation and Sub-0.2ns Deadtime Control
AU - Kao, Yu Yung
AU - Wang, Tz Wun
AU - Hung, Sheng Hsi
AU - Wen, Yong Hwa
AU - Yang, Tzu Hsien
AU - Li, Si Yi
AU - Chen, Ke Horng
AU - Lin, Ying Hsi
AU - Lin, Shian Ru
AU - Tsai, Tsung Yen
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - Monolithic gallium-nitride (GaN) high-electron-mobility transistors (HEMTs) have become popular due to their low parasitic capacitance, low on-resistance (RON), and no reverse recovery charge loss for high-frequency and high-power-density applications [1]-[6]. However, GaN HEMTs have several process defects [7], such as trapping effect and reverse-conduction loss, which will reduce the efficiency of GaN-based converters. Referring to Fig. 14.1.1, during the deadtime, the VSW falls to negative voltage before low-side GaN HEMT (QL) becomes conductive. Even without a body diode, QL will experience 'self-commutation loss' when the voltage difference between its gate and drain exceeds the threshold voltage (VTH, E(650V)). The overall efficiency decreases since GaN HEMTs have higher source-to-drain voltage drop (VSD) as compared to the body diode voltage of silicon MOSFETs. Although the power converter presented in [5] uses adaptive deadtime control to achieve a 3% efficiency improvement, due to the unpredictable delay of discrete control, the load-dependent deadtime is still not well controlled. Moreover, considering high switching operation, high dVsw/dt will cause gate ringing problem in switching period. At bottom middle of Fig. 14.1.1, the conventional negative turn-off gate bias and high drain voltage will cause a large electric field between gate and drain, thereby inducing serious trapping effect (bottom left of Fig. 14.1.1). The monolithic GaN driver with adaptive source current (IlCTRL) does not consider the parasitic effects during turn-off period (bottom right of Fig. 14.1.1) [1].
AB - Monolithic gallium-nitride (GaN) high-electron-mobility transistors (HEMTs) have become popular due to their low parasitic capacitance, low on-resistance (RON), and no reverse recovery charge loss for high-frequency and high-power-density applications [1]-[6]. However, GaN HEMTs have several process defects [7], such as trapping effect and reverse-conduction loss, which will reduce the efficiency of GaN-based converters. Referring to Fig. 14.1.1, during the deadtime, the VSW falls to negative voltage before low-side GaN HEMT (QL) becomes conductive. Even without a body diode, QL will experience 'self-commutation loss' when the voltage difference between its gate and drain exceeds the threshold voltage (VTH, E(650V)). The overall efficiency decreases since GaN HEMTs have higher source-to-drain voltage drop (VSD) as compared to the body diode voltage of silicon MOSFETs. Although the power converter presented in [5] uses adaptive deadtime control to achieve a 3% efficiency improvement, due to the unpredictable delay of discrete control, the load-dependent deadtime is still not well controlled. Moreover, considering high switching operation, high dVsw/dt will cause gate ringing problem in switching period. At bottom middle of Fig. 14.1.1, the conventional negative turn-off gate bias and high drain voltage will cause a large electric field between gate and drain, thereby inducing serious trapping effect (bottom left of Fig. 14.1.1). The monolithic GaN driver with adaptive source current (IlCTRL) does not consider the parasitic effects during turn-off period (bottom right of Fig. 14.1.1) [1].
UR - http://www.scopus.com/inward/record.url?scp=85128311409&partnerID=8YFLogxK
U2 - 10.1109/ISSCC42614.2022.9731595
DO - 10.1109/ISSCC42614.2022.9731595
M3 - Conference contribution
AN - SCOPUS:85128311409
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 228
EP - 230
BT - 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022
Y2 - 20 February 2022 through 26 February 2022
ER -