A low-voltage low-distortion MOS sampling switch

Chun Yueh Yang, Chung-Chih Hung

Research output: Contribution to journalConference articlepeer-review

18 Scopus citations


In order to reduce distortion due to variation of the gate overdrive and the threshold voltage, a novel low-voltage constantresistance sampling switch is proposed in this paper. The technique to reduce nonlinearity can be used in a high resolution sample and hold circuit. TSMC 0.18um standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.

Original languageEnglish
Article number1465291
Pages (from-to)3131-3134
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
StatePublished - 23 May 2005
EventIEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan
Duration: 23 May 200526 May 2005


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