A low-voltage low-distortion MOS sampling switch

Chun Yueh Yang; Chung-Chih Hung

doi:10.1109/ISCAS.2005.1465291

A low-voltage low-distortion MOS sampling switch

Chun Yueh Yang, Chung-Chih Hung

Department of Electrical and Computer Engineering

Research output: Contribution to journal › Conference article › peer-review

18 Scopus citations

Abstract

In order to reduce distortion due to variation of the gate overdrive and the threshold voltage, a novel low-voltage constantresistance sampling switch is proposed in this paper. The technique to reduce nonlinearity can be used in a high resolution sample and hold circuit. TSMC 0.18um standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.

Original language	English
Article number	1465291
Pages (from-to)	3131-3134
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
DOIs	https://doi.org/10.1109/ISCAS.2005.1465291
State	Published - 23 May 2005
Event	IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005 - Kobe, Japan Duration: 23 May 2005 → 26 May 2005

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abstract = "In order to reduce distortion due to variation of the gate overdrive and the threshold voltage, a novel low-voltage constantresistance sampling switch is proposed in this paper. The technique to reduce nonlinearity can be used in a high resolution sample and hold circuit. TSMC 0.18um standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.",

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AU - Hung, Chung-Chih

PY - 2005/5/23

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N2 - In order to reduce distortion due to variation of the gate overdrive and the threshold voltage, a novel low-voltage constantresistance sampling switch is proposed in this paper. The technique to reduce nonlinearity can be used in a high resolution sample and hold circuit. TSMC 0.18um standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.

AB - In order to reduce distortion due to variation of the gate overdrive and the threshold voltage, a novel low-voltage constantresistance sampling switch is proposed in this paper. The technique to reduce nonlinearity can be used in a high resolution sample and hold circuit. TSMC 0.18um standard CMOS technology is utilized in this research. Results indicate that much lower Total Harmonic Distortion (THD) is achieved by the proposed circuit. The low THD meets the requirements in the application of the low-voltage low-distortion switched-capacitor circuits.

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M3 - Conference article

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JO - Proceedings - IEEE International Symposium on Circuits and Systems

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T2 - IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

Y2 - 23 May 2005 through 26 May 2005

ER -

A low-voltage low-distortion MOS sampling switch

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