A low supply noise content-sensitive ROM architecture for SoC

Meng Fan Chang*, Lih Yih Chiou, Kuei-Ann Wen

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

3 Scopus citations

Abstract

Supply noise caused by fluctuation of peak current is increasingly important for SoC. This work proposes a content-sensitive architecture to effectively reduce the fluctuation of peak current and lower power consumption of ROMs for various code-patterns and cycles. We achieve both by arranging the data patterns of ROM and by adjusting the bitline structures accordingly. Our experiments on 0.25μm 256K bits ROM macros have shown that the fluctuation of peak current and power consumptions are less than 1.02% of the value using conventional approaches.

Original languageEnglish
Pages1021-1024
Number of pages4
StatePublished - 1 Dec 2004
Event2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology - Tainan, Taiwan
Duration: 6 Dec 20049 Dec 2004

Conference

Conference2004 IEEE Asia-Pacific Conference on Circuits and Systems, APCCAS 2004: SoC Design for Ubiquitous Information Technology
Country/TerritoryTaiwan
CityTainan
Period6/12/049/12/04

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