A low-power reference-less clock/data recovery for visible light communication devices requiring low data throughput

In this study a reference-less clock and data recovery (CDR) is designed and developed for the low speed visible light communication system based Internet of Things (IoT) tags. Design system incorporates an off-chip photodiode and an integrated-on chip front-end receiver with the reference-less CDR. For an IoT tags low power consumption, low supply voltage, and small area are the major design constraint. Considering these constraints, the circuit of the front-end receiver incorporate the near-threshold cascode current mirror based transimpedance amplifier, low pass filter and a comparator. On the other-hand, low power all-digital phase locked loop-based reference-less CDR is design herein with a modified loop filter, auto tune digital control oscillator and auto duty cycle adjustment circuit. The circuit is implemented in an integrated chip with area of 0.728 mm² via TSMC 180 nm process. Experimental measurement results of the tapeout chip shows that the phase noises are − 39.54 dBc/Hz @ 1 kHz, − 80.35 dBc/Hz @ 10 kHz and − 92.26 dBc/Hz @ 100 kHz. The measured jitter in the recovered clock is 3.312 ns (0.0033 UI). At 1 Mbps, the measured total power consumption is 5.58 μW. The achieve results shows that the implemented circuit in this study highly support the commercial low data rate based optical wireless sensing nodes for IoT tags.