A low power reconfigurable SAR ADC for CMOS MEMS sensor

Hao Min Lin; Kuei-Ann Wen

doi:10.1109/ISOCC.2017.8368775

A low power reconfigurable SAR ADC for CMOS MEMS sensor

Hao Min Lin, Kuei-Ann Wen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2017, ISOCC 2017
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	7-8
Number of pages	2
ISBN (Electronic)	9781538622858
DOIs	https://doi.org/10.1109/ISOCC.2017.8368775
State	Published - 29 May 2018
Event	14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of Duration: 5 Nov 2017 → 8 Nov 2017

Publication series

Name	Proceedings - International SoC Design Conference 2017, ISOCC 2017

Conference

Conference	14th International SoC Design Conference, ISOCC 2017
Country/Territory	Korea, Republic of
City	Seoul
Period	5/11/17 → 8/11/17

Keywords

Dual voltage
MEMS sensor
SAR ADC
Scaled resolution
Segmented capacitor array

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10.1109/ISOCC.2017.8368775

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@inproceedings{35f4bfbdf3ed468396bd7fecdab95809,

title = "A low power reconfigurable SAR ADC for CMOS MEMS sensor",

abstract = "This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.",

keywords = "Dual voltage, MEMS sensor, SAR ADC, Scaled resolution, Segmented capacitor array",

author = "Lin, {Hao Min} and Kuei-Ann Wen",

year = "2018",

month = may,

day = "29",

doi = "10.1109/ISOCC.2017.8368775",

language = "English",

series = "Proceedings - International SoC Design Conference 2017, ISOCC 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "7--8",

booktitle = "Proceedings - International SoC Design Conference 2017, ISOCC 2017",

address = "美國",

note = "14th International SoC Design Conference, ISOCC 2017 ; Conference date: 05-11-2017 Through 08-11-2017",

}

Lin, HM & Wen, K-A 2018, A low power reconfigurable SAR ADC for CMOS MEMS sensor. in Proceedings - International SoC Design Conference 2017, ISOCC 2017. Proceedings - International SoC Design Conference 2017, ISOCC 2017, Institute of Electrical and Electronics Engineers Inc., pp. 7-8, 14th International SoC Design Conference, ISOCC 2017, Seoul, Korea, Republic of, 5/11/17. https://doi.org/10.1109/ISOCC.2017.8368775

A low power reconfigurable SAR ADC for CMOS MEMS sensor. / Lin, Hao Min; Wen, Kuei-Ann.
Proceedings - International SoC Design Conference 2017, ISOCC 2017. Institute of Electrical and Electronics Engineers Inc., 2018. p. 7-8 (Proceedings - International SoC Design Conference 2017, ISOCC 2017).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A low power reconfigurable SAR ADC for CMOS MEMS sensor

AU - Lin, Hao Min

AU - Wen, Kuei-Ann

PY - 2018/5/29

Y1 - 2018/5/29

N2 - This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.

AB - This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.

KW - Dual voltage

KW - MEMS sensor

KW - SAR ADC

KW - Scaled resolution

KW - Segmented capacitor array

UR - http://www.scopus.com/inward/record.url?scp=85048876421&partnerID=8YFLogxK

U2 - 10.1109/ISOCC.2017.8368775

DO - 10.1109/ISOCC.2017.8368775

M3 - Conference contribution

AN - SCOPUS:85048876421

T3 - Proceedings - International SoC Design Conference 2017, ISOCC 2017

SP - 7

EP - 8

BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 14th International SoC Design Conference, ISOCC 2017

Y2 - 5 November 2017 through 8 November 2017

ER -

A low power reconfigurable SAR ADC for CMOS MEMS sensor

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