TY - GEN
T1 - A low power reconfigurable SAR ADC for CMOS MEMS sensor
AU - Lin, Hao Min
AU - Wen, Kuei-Ann
PY - 2018/5/29
Y1 - 2018/5/29
N2 - This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.
AB - This paper presents a reconfigurable successive approximation register (SAR) Analog-to-Digital Converter (ADC) of which the resolution can be scaled from 9 to 12 bits for various inertial MEMS sensor applications. The dual supply voltage skill separating digital and analog voltage is implemented for achieving low power consumption. In addition, level shifter connects the interface between digital and analog domain. 3 bit segmented capacitor array are used to decrease the static error and glitches from MSB switching. In the provided 9 to 12 bits mode, this structure consumes 2.5, 2.8, 3.9 and 9.7 μW and achieve 52.3, 57.7, 63.2 and 68.6 SNDR respectively, resulting in figure of merit (FoM) 148, 88.8, 66.3 and 88.4fJ/conversion-step.
KW - Dual voltage
KW - MEMS sensor
KW - SAR ADC
KW - Scaled resolution
KW - Segmented capacitor array
UR - http://www.scopus.com/inward/record.url?scp=85048876421&partnerID=8YFLogxK
U2 - 10.1109/ISOCC.2017.8368775
DO - 10.1109/ISOCC.2017.8368775
M3 - Conference contribution
AN - SCOPUS:85048876421
T3 - Proceedings - International SoC Design Conference 2017, ISOCC 2017
SP - 7
EP - 8
BT - Proceedings - International SoC Design Conference 2017, ISOCC 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 14th International SoC Design Conference, ISOCC 2017
Y2 - 5 November 2017 through 8 November 2017
ER -