A low-noise wide range delta-sigma frequency synthesizer for DTV broadband

Te Wen Liao*, Jun Ren Su, Chung-Chih Hung

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The proposed low noise wide frequency range Phase Loco Loop (PLL) proposed in TSMC 0.18-um CMOS technology is developed for DTV broadband. It incorporates a Extended Multi-band Ring Voltage Control Oscillator (VCO) to enhance the frequency selection range of the conventional Multi-band Ring VCO accomplishing a wide frequency range and better phase noise PLL. This frequency synthesizer is measured the phase noise of - 97.1dBc/Hz at 3MHz offset frequency and reference spurs below - 69.78dBc at 36MHz offset. The VCO gain Kvco (73MHz/V-328MHz/V) is improved by using the Extended Multi-band Ring VCO obtaining a better phase noise performance than the conventional Multi-band Ring VCO structure.

Original languageEnglish
Title of host publication2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings
Pages667-670
Number of pages4
DOIs
StatePublished - 2010
Event2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Athens, Greece
Duration: 12 Dec 201015 Dec 2010

Publication series

Name2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Conference

Conference2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
Country/TerritoryGreece
CityAthens
Period12/12/1015/12/10

Keywords

  • PLL
  • Synthesizer
  • VCO
  • Σ-Δ modulator

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