A Low-Noise Area-Efficient Column-Parallel ADC With an Input Triplet for a 120-dB High Dynamic Range CMOS Image Sensor

Pai Hsiang Hsu, Yueh Ru Lee, Chia-Hung Chen, Chung Chih Hung

Research output: Contribution to journalArticlepeer-review

Abstract

This article presents and demonstrates the design of a high dynamic range (HDR) CMOS image sensor (CIS). Detailed operation of various comparator circuits is analyzed. A low-noise, area-efficient, wide-input range comparator is proposed for HDR applications. Based on the analysis, a six-transistor (6T) comparator is proposed with a p-type metal oxide semiconductor (PMOS) input triplet, which effectively increases the input range of a conventional PMOS-input type comparator and compensates the charge injection and kT/C noise introduced from pixels switching between high-conversion-gain (HCG) and low-conversion-gain (LCG) modes. The proposed scheme achieves an extra high dynamic range (DR). A full HD (1920 <inline-formula> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 1080) HDR image sensor with 2.9 <inline-formula> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>m pixel pitches is fabricated in a 55 nm one-ploy five-metal (1P5M) CIS process. The incorporated analog-to-digital conversion (ADC) demonstrates a 12-bit resolution, a noise of 96 <inline-formula> <tex-math notation="LaTeX">$\mu_{\mathrm{VRMS}}$</tex-math> </inline-formula>, a power consumption of 25 <inline-formula> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula>W, an area of 2.9 <inline-formula> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 400 <inline-formula> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula>m, and its integral non-linearity (INL) and differential non-linearity (DNL) are <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>0.43/<inline-formula> <tex-math notation="LaTeX">$+$</tex-math> </inline-formula>7.22 and <inline-formula> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula>0.30/<inline-formula> <tex-math notation="LaTeX">$+$</tex-math> </inline-formula>0.29 LSB, respectively. The sensor achieves a 120-dB DR at 30 frames/sec and a temporal noise of 0.91e-.

Original languageEnglish
Pages (from-to)1-11
Number of pages11
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOIs
StateAccepted/In press - 2023

Keywords

  • Capacitance
  • Capacitors
  • CMOS image sensor (CIS)
  • comparator
  • correlated double sampling
  • dual conversion gain (DCG)
  • dual exposure
  • high dynamic range (HDR)
  • Metals
  • MOS devices
  • Power demand
  • Random access memory
  • readout circuit
  • single-slope analog-to-digital conversion (SS-ADC)
  • Switches

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