@inproceedings{cf0548904e33406581b2fee88034e3ea,
title = "A Low-Error and Area-Time Efficient Fixed-Width Booth Multiplier",
abstract = "In this paper, we develop a new methodology for designing a lower-error and area-time efficient 2 s-complement fixed-width Booth multiplier that receives two n-bit numbers and produces an n-bit product. By properly choosing the generalized index and binary thresholding, we derive a better error-compensation bias to reduce the truncation error. Since the proposed error-compensation bias is realizable, the constructing low-error fixed-width Booth multiplier is area-time efficient for VLSI implementation. Finally, we successfully apply the proposed fixed-width Booth multiplier to speech signal processing. The simulation results show that the performance is superior to that using the direct-truncation fixed-width Booth multiplier.",
author = "Song, {Min An} and Van, {Lan Da} and Huang, {Ting Chun} and Kuo, {Sy Yen}",
note = "Publisher Copyright: {\textcopyright} 2004 IEEE.; 46th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2003 ; Conference date: 27-12-2003 Through 30-12-2003",
year = "2003",
doi = "10.1109/MWSCAS.2003.1562355",
language = "English",
series = "Midwest Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "590--593",
editor = "Nadder Hamdy",
booktitle = "Midwest Symposium on Circuits and Systems",
address = "United States",
}