A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system

Bo-Cheng Lai; Patrick Schaumont; Ingrid Verbauwhede

doi:10.1109/ACSSC.2005.1600048

A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system

Bo-Cheng Lai^*, Patrick Schaumont, Ingrid Verbauwhede

^*Corresponding author for this work

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

This paper proposes a light-weight cooperative multi-threading programming model for an embedded multi-processor system. The synchronization between different threads is obtained by a test-and-set-lock. Each processor needs to acquire the lock before accessing shared resources. To reduce the overhead of software thread-management, a hardware thread-queue manager is added to maintain the stack pointer for each thread. This reduces off-chip memory accesses during context switches. The whole multi-processor system, including software stack and hardware architecture, is evaluated with a cycle-accurate simulation platform. With a data-flow-based image encoder as the driver application, the multi-processor system with hardware thread-queue manager achieves 9.5% performance speedup compared to a pure software thread-queue manager.

Original language	English
Title of host publication	Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers
Pages	1647-1651
Number of pages	5
DOIs	https://doi.org/10.1109/ACSSC.2005.1600048
State	Published - 1 Dec 2005
Event	39th Asilomar Conference on Signals, Systems and Computers - Pacific Grove, CA, United States Duration: 28 Oct 2005 → 1 Nov 2005

Publication series

Name	Conference Record - Asilomar Conference on Signals, Systems and Computers
Volume	2005
ISSN (Print)	1058-6393

Conference

Conference	39th Asilomar Conference on Signals, Systems and Computers
Country/Territory	United States
City	Pacific Grove, CA
Period	28/10/05 → 1/11/05

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10.1109/ACSSC.2005.1600048

Cite this

Lai, B-C., Schaumont, P., & Verbauwhede, I. (2005). A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system. In Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers (pp. 1647-1651). [1600048] (Conference Record - Asilomar Conference on Signals, Systems and Computers; Vol. 2005). https://doi.org/10.1109/ACSSC.2005.1600048

Lai, Bo-Cheng ; Schaumont, Patrick ; Verbauwhede, Ingrid. / A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system. Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers. 2005. pp. 1647-1651 (Conference Record - Asilomar Conference on Signals, Systems and Computers).

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title = "A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system",

abstract = "This paper proposes a light-weight cooperative multi-threading programming model for an embedded multi-processor system. The synchronization between different threads is obtained by a test-and-set-lock. Each processor needs to acquire the lock before accessing shared resources. To reduce the overhead of software thread-management, a hardware thread-queue manager is added to maintain the stack pointer for each thread. This reduces off-chip memory accesses during context switches. The whole multi-processor system, including software stack and hardware architecture, is evaluated with a cycle-accurate simulation platform. With a data-flow-based image encoder as the driver application, the multi-processor system with hardware thread-queue manager achieves 9.5% performance speedup compared to a pure software thread-queue manager.",

author = "Bo-Cheng Lai and Patrick Schaumont and Ingrid Verbauwhede",

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Lai, B-C, Schaumont, P & Verbauwhede, I 2005, A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system. in Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers., 1600048, Conference Record - Asilomar Conference on Signals, Systems and Computers, vol. 2005, pp. 1647-1651, 39th Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA, United States, 28/10/05. https://doi.org/10.1109/ACSSC.2005.1600048

A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system. / Lai, Bo-Cheng; Schaumont, Patrick; Verbauwhede, Ingrid.

Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers. 2005. p. 1647-1651 1600048 (Conference Record - Asilomar Conference on Signals, Systems and Computers; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - This paper proposes a light-weight cooperative multi-threading programming model for an embedded multi-processor system. The synchronization between different threads is obtained by a test-and-set-lock. Each processor needs to acquire the lock before accessing shared resources. To reduce the overhead of software thread-management, a hardware thread-queue manager is added to maintain the stack pointer for each thread. This reduces off-chip memory accesses during context switches. The whole multi-processor system, including software stack and hardware architecture, is evaluated with a cycle-accurate simulation platform. With a data-flow-based image encoder as the driver application, the multi-processor system with hardware thread-queue manager achieves 9.5% performance speedup compared to a pure software thread-queue manager.

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Lai B-C, Schaumont P, Verbauwhede I. A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system. In Conference Record of The Thirty-Ninth Asilomar Conference on Signals, Systems and Computers. 2005. p. 1647-1651. 1600048. (Conference Record - Asilomar Conference on Signals, Systems and Computers). doi: 10.1109/ACSSC.2005.1600048

A light-weight cooperative multi-threading with hardware supported thread-management on an embedded multi-processor system

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