A high-speed low-power rail-to-rail buffer amplifier for LCD driver application

Chin Wen Lu*

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review


A high-speed low-power rail-to-rail buffer amplifier, which is suitable for liquid crystal display driver application, is proposed. The buffer draws little current while static but has a large driving capability while transient. The circuit achieves the low dc power consumption but large driving capability by employing the variable-gain amplifiers to sense the transients of the input to turn on the output transistors, which are statically off in the stable state. This increases the speed of the circuit without increasing static power consumption too much. An experimental prototype output buffer implemented in a 0.35-μm CMOS technology demonstrates that the circuit can operate under a wide power supply range. Quiescent current of 5 μA is measured. The buffer exhibits the settling times of 1.5 μs for a voltage swing of 0.1 ∼ (VDD - 0.1) V under a 600 pF capacitance load. The area of this buffer is 30×98μm2.

Original languageEnglish
Pages (from-to)1640-1643
Number of pages4
JournalDigest of Technical Papers - SID International Symposium
Issue number1
StatePublished - 2007
Event2007 SID International Symposium - Long Beach, CA, United States
Duration: 23 May 200725 May 2007


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