A GaN-on-Si Gate Driver With Self-Pumped Drive Enhance and Short-Period Negative Voltage Techniques for Reduction of 14.7× Tailing Power Loss and 37% Reverse Conduction Loss

Hsing Yen Tsai, Ke Horng Chen*, Kuo Lin Zheng, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

The gallium nitride (GaN)-on-Si low-side gate driver proposed in this article has four main features: First, the self-pumped drive enhance (SPDE) technique achieves fast transients. Second, short-period negative voltage (SPNV) technique avoids the Miller coupling effect and improves efficiency. Third, a dual-mode Voltage regulator ensures sufficient current and minimizes power dissipation. Finally, monolithic low-side gate drivers provide robust drive capability. This work can suppress the ringing caused by high dV/dt of VDS, thereby minimizing the tail time Ttail, achieving a 14.7× reduction in tailing current loss, suppressing abnormal conduction, and reducing reverse conduction loss by 37.0%.

Original languageEnglish
Pages (from-to)784-793
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume59
Issue number3
DOIs
StatePublished - 1 Mar 2024

Keywords

  • Dual-mode voltage regulator
  • gallium nitride (GaN)-on-Si
  • monolithic low-side gate driver
  • self-pumped drive enhance (SPDE) technique
  • short-period negative voltage (SPNV) technique

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