TY - GEN
T1 - A Fully Integrated GaN-on-Silicon Gate Driver and GaN Switch with Temperature-compensated Fast Turn-on Technique for Improving Reliability
AU - Chen, Hsuan Yu
AU - Kao, Yu Yung
AU - Zhang, Zhi Qiang
AU - Liao, Cheng Hsiang
AU - Yang, Hong Yuan
AU - Hsu, Ming Sheng
AU - Chen, Ke-Horng
AU - Lin, Ying Hsi
AU - Lin, Shian Ru
AU - Tsai, Tsung Yen
N1 - Publisher Copyright:
© 2021 IEEE.
Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2021/2/13
Y1 - 2021/2/13
N2 - Gallium-Nitride (GaN) high-electron-mobility transistors (HEMTs) have the advantages of low parasitic capacitance, low on-resistance (R_{ON}), and no reverse recovery charge loss [1-5]. Thus, using GaN HEMTs one can optimize the performance of power integrated circuits. However, today's GaN HEMTs have serious process defects, especially depending on the selected substrate. A 650V GaN-on-Si structure is shown in Fig. 33.1.1, and there are severe heterogeneous defects between the GaN buffer layer and the Si substrate. Thus, temperature changes will seriously aggravate the hot carrier injection, and the two-dimensional electron gas (2DEG) layer in the GaN HEMT will weaken over time. The on-resistance (R_{ON}) and threshold voltage (V_{TH,E}) of 650 GaN HEMT gradually increase, and in turn, rapidly decline the reliability. Although state-of the-art gate drivers can effectively reduce the ringing at the VGS of the GaN switch [4-6], the temperature reliability problem still exists. The tri-slope gate control in [4] adjusts the sourcing current IControl to drive the gate voltage VG. The active slew-rate control method in [6] uses different gate resistors RG1 and RG2 to control the driving current IG. Both control techniques did not consider temperature-dependent threshold voltage. To completely reduce parasitic effects, monolithic integration of gate driver and GaN HEMT in GaN-on-Si process has been shown in [3, 7]. However, they did not carefully consider the reliability degradation caused by the variations of V_{TH,E} and Miller plateau voltage due to temperature effects. High switching operations enlarge the temperature effect on monolithic integration.
AB - Gallium-Nitride (GaN) high-electron-mobility transistors (HEMTs) have the advantages of low parasitic capacitance, low on-resistance (R_{ON}), and no reverse recovery charge loss [1-5]. Thus, using GaN HEMTs one can optimize the performance of power integrated circuits. However, today's GaN HEMTs have serious process defects, especially depending on the selected substrate. A 650V GaN-on-Si structure is shown in Fig. 33.1.1, and there are severe heterogeneous defects between the GaN buffer layer and the Si substrate. Thus, temperature changes will seriously aggravate the hot carrier injection, and the two-dimensional electron gas (2DEG) layer in the GaN HEMT will weaken over time. The on-resistance (R_{ON}) and threshold voltage (V_{TH,E}) of 650 GaN HEMT gradually increase, and in turn, rapidly decline the reliability. Although state-of the-art gate drivers can effectively reduce the ringing at the VGS of the GaN switch [4-6], the temperature reliability problem still exists. The tri-slope gate control in [4] adjusts the sourcing current IControl to drive the gate voltage VG. The active slew-rate control method in [6] uses different gate resistors RG1 and RG2 to control the driving current IG. Both control techniques did not consider temperature-dependent threshold voltage. To completely reduce parasitic effects, monolithic integration of gate driver and GaN HEMT in GaN-on-Si process has been shown in [3, 7]. However, they did not carefully consider the reliability degradation caused by the variations of V_{TH,E} and Miller plateau voltage due to temperature effects. High switching operations enlarge the temperature effect on monolithic integration.
UR - http://www.scopus.com/inward/record.url?scp=85102376524&partnerID=8YFLogxK
U2 - 10.1109/ISSCC42613.2021.9365828
DO - 10.1109/ISSCC42613.2021.9365828
M3 - Conference contribution
AN - SCOPUS:85102376524
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 460
EP - 462
BT - 2021 IEEE International Solid-State Circuits Conference, ISSCC 2021 - Digest of Technical Papers
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 IEEE International Solid-State Circuits Conference, ISSCC 2021
Y2 - 13 February 2021 through 22 February 2021
ER -