A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR

Shang Hsien Yang; Yuan Han Yang; Ke-Horng Chen; Chung-Chih Hung; Chin Long Wey; Ying Hsi Lin; Tsung Yen Tsai; Chen Chih Huang; Chao Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin Yu Luo; Shih Ming Wang; Long Der Chen; Cheng Chen Yang; Huang Tian Hui

doi:10.1109/ISCAS.2014.6865724

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR

Shang Hsien Yang, Yuan Han Yang, Ke-Horng Chen, Chung-Chih Hung, Chin Long Wey, Ying Hsi Lin, Tsung Yen Tsai, Chen Chih Huang, Chao Cheng Lee, Zhih Han Tai, Yi Hsuan Cheng, Chi Chung Tsai, Hsin Yu Luo, Shih Ming Wang, Long Der Chen, Cheng Chen Yang, Huang Tian Hui

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Scopus citations

Abstract

This paper presents a dual-level dual-phase pulse-width modulation (DLDP PWM) Class-D audio amplifier circuit which enhance amplifier linearity and reduce distortion. The proposed DLDP PWM Class-D audio amplifier includes two sets of non-overlapping triangular waves, each at its respectful offset levels. Each set of triangular waves is composed of two 180° out-of-phase triangular waves. The differential power stage consists of 8 power transistors, with voltage swings up to +/- 6V. Simulated results shows that the proposed DLDP PWM Class-D audio amplifier features an SNR up to 105 dB, and the THD is suppressed below 0.001 %, with the 3rd harmonic below -102 dBV.

Original language	English
Title of host publication	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2676-2679
Number of pages	4
ISBN (Print)	9781479934324
DOIs	https://doi.org/10.1109/ISCAS.2014.6865724
State	Published - 2014
Event	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 1 Jun 2014 → 5 Jun 2014

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Country/Territory	Australia
City	Melbourne, VIC
Period	1/06/14 → 5/06/14

Keywords

Class-D
THD
dual-level dual-phase PWM

Access to Document

10.1109/ISCAS.2014.6865724

Cite this

Yang, S. H., Yang, Y. H., Chen, K.-H., Hung, C.-C., Wey, C. L., Lin, Y. H., Tsai, T. Y., Huang, C. C., Lee, C. C., Tai, Z. H., Cheng, Y. H., Tsai, C. C., Luo, H. Y., Wang, S. M., Chen, L. D., Yang, C. C., & Hui, H. T. (2014). A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 (pp. 2676-2679). Article 6865724 (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2014.6865724

Yang, Shang Hsien ; Yang, Yuan Han ; Chen, Ke-Horng et al. / A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 2676-2679 (Proceedings - IEEE International Symposium on Circuits and Systems).

@inproceedings{d876053f2adb45938003f3dd972fdf43,

title = "A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001\% THD, 112 dB SNR",

abstract = "This paper presents a dual-level dual-phase pulse-width modulation (DLDP PWM) Class-D audio amplifier circuit which enhance amplifier linearity and reduce distortion. The proposed DLDP PWM Class-D audio amplifier includes two sets of non-overlapping triangular waves, each at its respectful offset levels. Each set of triangular waves is composed of two 180° out-of-phase triangular waves. The differential power stage consists of 8 power transistors, with voltage swings up to +/- 6V. Simulated results shows that the proposed DLDP PWM Class-D audio amplifier features an SNR up to 105 dB, and the THD is suppressed below 0.001 \%, with the 3rd harmonic below -102 dBV.",

keywords = "Class-D, THD, dual-level dual-phase PWM",

author = "Yang, \{Shang Hsien\} and Yang, \{Yuan Han\} and Ke-Horng Chen and Chung-Chih Hung and Wey, \{Chin Long\} and Lin, \{Ying Hsi\} and Tsai, \{Tsung Yen\} and Huang, \{Chen Chih\} and Lee, \{Chao Cheng\} and Tai, \{Zhih Han\} and Cheng, \{Yi Hsuan\} and Tsai, \{Chi Chung\} and Luo, \{Hsin Yu\} and Wang, \{Shih Ming\} and Chen, \{Long Der\} and Yang, \{Cheng Chen\} and Hui, \{Huang Tian\}",

year = "2014",

doi = "10.1109/ISCAS.2014.6865724",

language = "English",

isbn = "9781479934324",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "2676--2679",

booktitle = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014",

address = "美國",

note = "2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 ; Conference date: 01-06-2014 Through 05-06-2014",

}

Yang, SH, Yang, YH, Chen, K-H , Hung, C-C, Wey, CL, Lin, YH, Tsai, TY, Huang, CC, Lee, CC, Tai, ZH, Cheng, YH, Tsai, CC, Luo, HY, Wang, SM, Chen, LD, Yang, CC & Hui, HT 2014, A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. in 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014., 6865724, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., pp. 2676-2679, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, Melbourne, VIC, Australia, 1/06/14. https://doi.org/10.1109/ISCAS.2014.6865724

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. / Yang, Shang Hsien; Yang, Yuan Han; Chen, Ke-Horng et al.
2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 2676-2679 6865724 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR

AU - Yang, Shang Hsien

AU - Yang, Yuan Han

AU - Chen, Ke-Horng

AU - Hung, Chung-Chih

AU - Wey, Chin Long

AU - Lin, Ying Hsi

AU - Tsai, Tsung Yen

AU - Huang, Chen Chih

AU - Lee, Chao Cheng

AU - Tai, Zhih Han

AU - Cheng, Yi Hsuan

AU - Tsai, Chi Chung

AU - Luo, Hsin Yu

AU - Wang, Shih Ming

AU - Chen, Long Der

AU - Yang, Cheng Chen

AU - Hui, Huang Tian

PY - 2014

Y1 - 2014

N2 - This paper presents a dual-level dual-phase pulse-width modulation (DLDP PWM) Class-D audio amplifier circuit which enhance amplifier linearity and reduce distortion. The proposed DLDP PWM Class-D audio amplifier includes two sets of non-overlapping triangular waves, each at its respectful offset levels. Each set of triangular waves is composed of two 180° out-of-phase triangular waves. The differential power stage consists of 8 power transistors, with voltage swings up to +/- 6V. Simulated results shows that the proposed DLDP PWM Class-D audio amplifier features an SNR up to 105 dB, and the THD is suppressed below 0.001 %, with the 3rd harmonic below -102 dBV.

AB - This paper presents a dual-level dual-phase pulse-width modulation (DLDP PWM) Class-D audio amplifier circuit which enhance amplifier linearity and reduce distortion. The proposed DLDP PWM Class-D audio amplifier includes two sets of non-overlapping triangular waves, each at its respectful offset levels. Each set of triangular waves is composed of two 180° out-of-phase triangular waves. The differential power stage consists of 8 power transistors, with voltage swings up to +/- 6V. Simulated results shows that the proposed DLDP PWM Class-D audio amplifier features an SNR up to 105 dB, and the THD is suppressed below 0.001 %, with the 3rd harmonic below -102 dBV.

KW - Class-D

KW - THD

KW - dual-level dual-phase PWM

UR - https://www.scopus.com/pages/publications/84907411493

U2 - 10.1109/ISCAS.2014.6865724

DO - 10.1109/ISCAS.2014.6865724

M3 - Conference contribution

AN - SCOPUS:84907411493

SN - 9781479934324

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

SP - 2676

EP - 2679

BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014

Y2 - 1 June 2014 through 5 June 2014

ER -

Yang SH, Yang YH, Chen KH , Hung CC, Wey CL, Lin YH et al. A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 2676-2679. 6865724. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2014.6865724

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR

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Keywords

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