Abstract
This article proposes a digital two-stage phase noise (PN) compensation and residual carrier frequency offset (rCFO) and residual sampling clock offset (rSCO) tracking module in the baseband receiver side for single carrier (SC) systems in the millimeter-wave (mmW) band. The proposed two-stage PN compensation and rCFO/rSCO tracking module (2STG-PNC&T) includes a correlation-based linear interpolation method for the common phase error (CPE) of the low-frequency PN, a subsymbol CPE compensation with a reformed low-complexity π /4 robust PN slicer for the high-frequency PN, and a tracking mechanism for rCFO and rSCO estimation on 64-QAM under the harsh PN condition of the frequency synthesizers used in the mmW band. The proposed module can restrict the maximum rCFO/rSCO within ±0.4 ppm and track the phase error caused by the PN successfully. Besides, the compensated power spectral density of the residual PN is reduced from -90 to -125 dBc/Hz at 1-MHz offset. A four-time parallelism architecture of the new 2STG-PNC&T is proposed to work at a 625-MHz clock rate under 64-QAM for 15 Gb/s transmission. The gate count/power of the proposed design is only 4.0%/6.9% of the overall digital baseband, respectively.
Original language | English |
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Pages (from-to) | 904 - 915 |
Number of pages | 12 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 29 |
Issue number | 5 |
DOIs | |
State | Published - May 2021 |
Keywords
- Baseband
- Clocks
- Frequency synthesizers
- Hardware
- IEEE 802.11ad/ay
- Integrated circuit modeling
- millimeter wave (mmW)
- Phase locked loops
- phase noise (PN)
- residual carrier frequency offset/residual sampling clock offset (rCFO/rSCO) tracking
- single carrier (SC)
- slicer.
- Standards