A D-Band CMOS Frequency Multiplier Design Using Transformer Phase Shifting

Yun Hao Liu*, I. Ming Ku, Chien Nan Kuo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A frequency multiplier chain is realized in 40 nm CMOS technology for signal generation in the D-band. It consists of two frequency doublers, and features in compact size. Using the Gilbert-cell with the proposed transformer phase shifting, the simulated conversion gain reaches 2.5 dB, about 7 dB more than that with transmission lines in other designs. The maximum output power of 0.5 dBm is measured at 152 GHz, with low dc power consumption of 77 mW and conversion efficiency of 1.4%. The 3-dB bandwidth achieves 17%. The circuit core size is only 0.066

Original languageEnglish
Title of host publication2024 49th International Conference on Infrared, Millimeter, and Terahertz Waves, IRMMW-THz 2024
PublisherIEEE Computer Society
ISBN (Electronic)9798350370324
DOIs
StatePublished - 2024
Event49th International Conference on Infrared, Millimeter, and Terahertz Waves, IRMMW-THz 2024 - Perth, Australia
Duration: 1 Sep 20246 Sep 2024

Publication series

NameInternational Conference on Infrared, Millimeter, and Terahertz Waves, IRMMW-THz
ISSN (Print)2162-2027
ISSN (Electronic)2162-2035

Conference

Conference49th International Conference on Infrared, Millimeter, and Terahertz Waves, IRMMW-THz 2024
Country/TerritoryAustralia
CityPerth
Period1/09/246/09/24

Keywords

  • CMOS
  • D-band
  • frequency doubler
  • Gilbert-cell

Fingerprint

Dive into the research topics of 'A D-Band CMOS Frequency Multiplier Design Using Transformer Phase Shifting'. Together they form a unique fingerprint.

Cite this