A comparative analysis of time-domain and digital-domain hardware accelerators for neural networks

Hamza Al Maharmeh, Nabil J. Sarhan, Chung Chih Hung, Mohammed Ismail, Mohammad Alhawari

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

This paper presents a comprehensive analysis of hardware accelerators for neural networks in both the digital and time domains, where the latter includes spatially unrolled (SU) and recursive (REC) architectures. All accelerators are implemented and synthesized in a 65nm CMOS technology. An identical neural network model is implemented in the digital and time domain for comparative purposes in terms of throughput, power consumption, area, and energy efficiency. Post-synthesis results show that SU achieves the highest energy efficiency of 145 TOp/s/W with a throughput of 4 GOp/s. The digital core is the fastest among other cores, whereas REC is the slowest but is the most area-efficient, occupying 0.114 mm2. SU is more suited for applications with stringent power constraints and average performance, while REC is better suited for applications where the area is the most important requirement and the throughput is less significant. In contrast, the digital core is preferable for large neural networks and critical applications that require high performance.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
StatePublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 22 May 202128 May 2021

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period22/05/2128/05/21

Keywords

  • Analog domain
  • Digital-Domain Accelerators
  • Recursive
  • Spatially unrolled
  • Time-Domain Accelerators
  • Time-Domain Computation

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