A Compact Model of Metal-Ferroelectric-Insulator-Semiconductor Tunnel Junction

Chien Ting Tung*, Girish Pahwa, Sayeef Salahuddin, Chenming Hu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

In this article, we present a compact model of metal-ferroelectric (FE)-insulator-semiconductor (MFIS) tunnel junction. Unlike the metal-FE-metal (MFM) structure with only one insulator layer, MFIS-FE tunnel junction (FTJ) contains two insulator layers and a semiconductor electrode. The complex structure makes it difficult to self-consistently solve the Poisson and charge equations. We report the first compact model of MFIS-FTJ to our knowledge. Previous modeling studies focused on numerical simulation, which is time-consuming and not applicable to circuit simulation. The presented compact model is suitable for commercial SPICE IC simulation. It includes a FE model that can capture polarization switching under arbitrary applied voltage, an insulator-semiconductor model that calculates the potential profile of the MFIS stack, and an analytical tunneling current model. We demonstrate that this model can be used to simulate and fit both n-type and p-type MFIS-FTJs.

Original languageEnglish
Pages (from-to)414-418
Number of pages5
JournalIEEE Transactions on Electron Devices
Volume69
Issue number1
DOIs
StatePublished - 1 Jan 2022

Keywords

  • Compact model
  • FE memory
  • ferroelectric (FE)
  • ferroelectric tunnel junction (FTJ)
  • hafnium zirconium oxide (HZO)

Fingerprint

Dive into the research topics of 'A Compact Model of Metal-Ferroelectric-Insulator-Semiconductor Tunnel Junction'. Together they form a unique fingerprint.

Cite this