A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique

Yi Ching Chiu; Chieh Sheng Hung; Rong Bin Guo; Ke Horng Chen; Kuo Lin Zheng; Ying Hsi Lin; Shian Ru Lin; Tsung Yen Tsai

doi:10.1109/ESSERC62670.2024.10719588

A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique

Yi Ching Chiu^*, Chieh Sheng Hung, Rong Bin Guo, Ke Horng Chen, Kuo Lin Zheng, Ying Hsi Lin, Shian Ru Lin, Tsung Yen Tsai

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper proposes a flying-capacitor sharing dynamic four-path (FCSD-4P) hybrid converter that can have a duty (D) ranging from 0 to 100% to break through the limitation of D <50% to reach a wide voltage conversion ratio (VCR) from 0-50%%. To maintain high efficiency across varied load current (ILOAD), FCSD-4P dynamically adjusts the number of energy pathways in real-time and operates in discontinuous conduction mode (DCM) during low load conditions to enhance light load efficiency. With only low voltage (LV) devices, FCSD-4P converter can largely reduce the area consumption and conduction loss simultaneously. Furthermore, this design incorporates fast transient and reduced body diode loss (RBDL) techniques to improve transient response and minimize energy wastage during DCM. This design is manufactured using a 150 nm BCD process, occupying a chip area of 3860 × 2100μm2. For the conversion from 6 V to 1.8 V, the converter attains a peak efficiency of 94.2%.

Original language	English
Title of host publication	ESSERC 2024 - Proceedings
Subtitle of host publication	50th IEEE European Solid-State Electronics Research Conference
Publisher	IEEE Computer Society
Pages	601-604
Number of pages	4
ISBN (Electronic)	9798350388138
DOIs	https://doi.org/10.1109/ESSERC62670.2024.10719588
State	Published - 2024
Event	50th IEEE European Solid-State Electronics Research Conference, ESSERC 2024 - Bruges, Belgium Duration: 9 Sep 2024 → 12 Sep 2024

Publication series

Name	European Solid-State Circuits Conference
ISSN (Print)	1930-8833

Conference

Conference	50th IEEE European Solid-State Electronics Research Conference, ESSERC 2024
Country/Territory	Belgium
City	Bruges
Period	9/09/24 → 12/09/24

Keywords

fast transient
hybrid converter
reduced body diode loss technique
wide voltage conversion ratio

Access to Document

10.1109/ESSERC62670.2024.10719588

Cite this

Chiu, Y. C., Hung, C. S., Guo, R. B., Chen, K. H., Zheng, K. L., Lin, Y. H., Lin, S. R., & Tsai, T. Y. (2024). A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique. In ESSERC 2024 - Proceedings: 50th IEEE European Solid-State Electronics Research Conference (pp. 601-604). (European Solid-State Circuits Conference). IEEE Computer Society. https://doi.org/10.1109/ESSERC62670.2024.10719588

Chiu, Yi Ching ; Hung, Chieh Sheng ; Guo, Rong Bin et al. / A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique. ESSERC 2024 - Proceedings: 50th IEEE European Solid-State Electronics Research Conference. IEEE Computer Society, 2024. pp. 601-604 (European Solid-State Circuits Conference).

@inproceedings{5fb24401c6024fa79e242f7111c1eafe,

title = "A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique",

abstract = "This paper proposes a flying-capacitor sharing dynamic four-path (FCSD-4P) hybrid converter that can have a duty (D) ranging from 0 to 100% to break through the limitation of D <50% to reach a wide voltage conversion ratio (VCR) from 0-50%%. To maintain high efficiency across varied load current (ILOAD), FCSD-4P dynamically adjusts the number of energy pathways in real-time and operates in discontinuous conduction mode (DCM) during low load conditions to enhance light load efficiency. With only low voltage (LV) devices, FCSD-4P converter can largely reduce the area consumption and conduction loss simultaneously. Furthermore, this design incorporates fast transient and reduced body diode loss (RBDL) techniques to improve transient response and minimize energy wastage during DCM. This design is manufactured using a 150 nm BCD process, occupying a chip area of 3860 × 2100μm2. For the conversion from 6 V to 1.8 V, the converter attains a peak efficiency of 94.2%.",

keywords = "fast transient, hybrid converter, reduced body diode loss technique, wide voltage conversion ratio",

author = "Chiu, {Yi Ching} and Hung, {Chieh Sheng} and Guo, {Rong Bin} and Chen, {Ke Horng} and Zheng, {Kuo Lin} and Lin, {Ying Hsi} and Lin, {Shian Ru} and Tsai, {Tsung Yen}",

note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 50th IEEE European Solid-State Electronics Research Conference, ESSERC 2024 ; Conference date: 09-09-2024 Through 12-09-2024",

year = "2024",

doi = "10.1109/ESSERC62670.2024.10719588",

language = "English",

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Chiu, YC, Hung, CS, Guo, RB, Chen, KH, Zheng, KL, Lin, YH, Lin, SR & Tsai, TY 2024, A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique. in ESSERC 2024 - Proceedings: 50th IEEE European Solid-State Electronics Research Conference. European Solid-State Circuits Conference, IEEE Computer Society, pp. 601-604, 50th IEEE European Solid-State Electronics Research Conference, ESSERC 2024, Bruges, Belgium, 9/09/24. https://doi.org/10.1109/ESSERC62670.2024.10719588

A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique. / Chiu, Yi Ching; Hung, Chieh Sheng; Guo, Rong Bin et al.
ESSERC 2024 - Proceedings: 50th IEEE European Solid-State Electronics Research Conference. IEEE Computer Society, 2024. p. 601-604 (European Solid-State Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Chen, Ke Horng

AU - Zheng, Kuo Lin

AU - Lin, Ying Hsi

AU - Lin, Shian Ru

AU - Tsai, Tsung Yen

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N2 - This paper proposes a flying-capacitor sharing dynamic four-path (FCSD-4P) hybrid converter that can have a duty (D) ranging from 0 to 100% to break through the limitation of D <50% to reach a wide voltage conversion ratio (VCR) from 0-50%%. To maintain high efficiency across varied load current (ILOAD), FCSD-4P dynamically adjusts the number of energy pathways in real-time and operates in discontinuous conduction mode (DCM) during low load conditions to enhance light load efficiency. With only low voltage (LV) devices, FCSD-4P converter can largely reduce the area consumption and conduction loss simultaneously. Furthermore, this design incorporates fast transient and reduced body diode loss (RBDL) techniques to improve transient response and minimize energy wastage during DCM. This design is manufactured using a 150 nm BCD process, occupying a chip area of 3860 × 2100μm2. For the conversion from 6 V to 1.8 V, the converter attains a peak efficiency of 94.2%.

AB - This paper proposes a flying-capacitor sharing dynamic four-path (FCSD-4P) hybrid converter that can have a duty (D) ranging from 0 to 100% to break through the limitation of D <50% to reach a wide voltage conversion ratio (VCR) from 0-50%%. To maintain high efficiency across varied load current (ILOAD), FCSD-4P dynamically adjusts the number of energy pathways in real-time and operates in discontinuous conduction mode (DCM) during low load conditions to enhance light load efficiency. With only low voltage (LV) devices, FCSD-4P converter can largely reduce the area consumption and conduction loss simultaneously. Furthermore, this design incorporates fast transient and reduced body diode loss (RBDL) techniques to improve transient response and minimize energy wastage during DCM. This design is manufactured using a 150 nm BCD process, occupying a chip area of 3860 × 2100μm2. For the conversion from 6 V to 1.8 V, the converter attains a peak efficiency of 94.2%.

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Chiu YC, Hung CS, Guo RB, Chen KH, Zheng KL, Lin YH et al. A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique. In ESSERC 2024 - Proceedings: 50th IEEE European Solid-State Electronics Research Conference. IEEE Computer Society. 2024. p. 601-604. (European Solid-State Circuits Conference). doi: 10.1109/ESSERC62670.2024.10719588

A 94.2% Peak Efficiency Full Duty Range Flying-Capacitor Sharing Dynamic Four-Path Hybrid Converter with Reduced Body Diode Loss Technique

Abstract

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Keywords

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