A 4H-SiC Trench MOS Capacitor Structure for Sidewall Oxide Characteristics Measurement

Huai Lin Huang*, Li Tien Hsuesh, Yen Cheng Tu, Bing Yue Tsui

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Test structure for evaluating gate oxide properties on the trench sidewall in 4H-SiC is proposed. Using the thick bottom oxide and poly-Silicon spacer structure, we are able to measure the capacitance characteristics directly and extract the interface state density. It is observed that typical NO annealing process cannot passivate the trench etching induced defects effectively.

Original languageEnglish
Title of host publication2024 IEEE 36th International Conference on Microelectronic Test Structures, ICMTS 2024 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350329896
DOIs
StatePublished - 2024
Event36th IEEE International Conference on Microelectronic Test Structures, ICMTS 2024 - Edinburgh, United Kingdom
Duration: 15 Apr 202418 Apr 2024

Publication series

NameIEEE International Conference on Microelectronic Test Structures
ISSN (Print)1071-9032
ISSN (Electronic)2158-1029

Conference

Conference36th IEEE International Conference on Microelectronic Test Structures, ICMTS 2024
Country/TerritoryUnited Kingdom
CityEdinburgh
Period15/04/2418/04/24

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