A 40nm 1.0Mb pipeline 6T SRAM with variation-tolerant Step-Up Word-Line and Adaptive Data-Aware Write-Assist

Chi Shin Chang, Hao I. Yang, Wei Nan Liao, Yi Wei Lin, Nan Chun Lien, Chien Hen Chen, Ching Te Chuang, Wei Hwang, Shyh-Jye Jou, Ming Hsien Tu, Huan Shun Huang, Yong Jyun Hu, Paul Sen Kan, Cheng Yo Cheng, Wei Chang Wang, Jian Hao Wang, Kuen Di Lee, Chia Cheng Chen, Wei Chiang Shih

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

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Engineering & Materials Science