A 40Gb/s all-digital adaptive noise-suppression feed-forward filter/equalizer (AFFE) and adaptive decision feedback equalizer (ADFE) for 2-level pulse amplitude modulation (2-PAM) systems is presented. Batch mode coefficients update (BMCU) unit together with coefficients-lookahead scheme are proposed to achieve high parallelism architecture for ADFE. With these schemes, new extended incremental coefficients-lookahead filter architecture is proposed to provide high throughput rate and to reduce hardware complexity of parallel ADFE. Besides, feed-forward noise-suppression architecture is proposed for AFFE to provide better signal-to-noise ratio (SNR). The equalizer operates at 1 GHz system clock with 40 parallelisms is implemented in 40nm CMOS technology with a core area 0.23mm2. The measurement results verify the equalizer performance and the maximum throughput of 40Gb/s is achieved under 0.9V supply with 4.35pJ/bit energy efficiency.