A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer

Wei-Zen Chen; Jia Xian Chang; Ying Jen Hong; Meng Tzer Wong; Chien Liang Kuo

A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer

Wei-Zen Chen^*, Jia Xian Chang, Ying Jen Hong, Meng Tzer Wong, Chien Liang Kuo

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to conference › Paper › peer-review

3 Scopus citations

Abstract

This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.

Original language	English
Pages	169-172
Number of pages	4
State	Published - Apr 2002
Event	2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium - Seatle, WA, United States Duration: 2 Jun 2002 → 4 Jun 2002

Conference

Conference	2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
Country/Territory	United States
City	Seatle, WA
Period	2/06/02 → 4/06/02

Cite this

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title = "A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer",

abstract = "This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.",

author = "Wei-Zen Chen and Chang, {Jia Xian} and Hong, {Ying Jen} and Wong, {Meng Tzer} and Kuo, {Chien Liang}",

year = "2002",

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note = "2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium ; Conference date: 02-06-2002 Through 04-06-2002",

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AU - Chen, Wei-Zen

AU - Chang, Jia Xian

AU - Hong, Ying Jen

AU - Wong, Meng Tzer

AU - Kuo, Chien Liang

PY - 2002/4

Y1 - 2002/4

N2 - This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.

AB - This paper describes the design of a CMOS frequency synthesizer for 2.3/4.6 GHz wireless applications. This synthesizer provides dual band output signals by means of a novel frequency doubling technique. Output frequency of the proposed synthesizer ranges from 1.87 GHz-2.3 GHz and 3.74 GHz-4.6 GHz. Fabricated in a 0.35 μm CMOS process, this chip consumes a total power of 80 mW from a single 2 V supply. Chip size is 3210μm × 2410 μm.

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M3 - Paper

AN - SCOPUS:0036309675

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EP - 172

T2 - 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium

Y2 - 2 June 2002 through 4 June 2002

ER -

A 2V, 2.3/4.6 GHz dual-band CMOS frequency synthesizer

Abstract

Conference

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