TY - JOUR
T1 - A 2.56 Gb/s Soft RS (255, 239) decoder chip for optical communication systems
AU - Lin, Yi Min
AU - Hsu, Chih Hsiang
AU - Chang, Hsie-Chia
AU - Lee, Chen-Yi
PY - 2014/1/1
Y1 - 2014/1/1
N2 - Due to high transmission rate requirement for optical communication systems, the growing uncertainty of received signals results in the limited transmission distance. In this paper, a decision-confined soft RS decoder chip is proposed to enhance the error correcting performance with area-efficient architectures. Instead of generating numerous possible candidate codewords and determining the most likely one as output codeword, our approach produces only one codeword by confining the degree of error location polynomial. Therefore, hardware complexity is significantly reduced by eliminating decision making unit. Moreover, an iteration-reduced RiBM algorithm is provided to enlarge the coding gain by using more least reliable positions (LRPs) in the limited operation latency. According to simulation results, our proposed soft RS (255, 239; 8) decoder with 5 LRPs outperforms 0.4 dB at 10-4 codeword error rate (CER) as compared to hard RS decoders. Implemented in standard CMOS 90 nm technology, the soft decoder chip can achieve 2.56 Gb/s throughput with similar complexity as a hard decoder. It can fit well for 10-40 Gb/s with 16 RS decoders in optical fiber systems and 2.5 Gb/s GPON applications.
AB - Due to high transmission rate requirement for optical communication systems, the growing uncertainty of received signals results in the limited transmission distance. In this paper, a decision-confined soft RS decoder chip is proposed to enhance the error correcting performance with area-efficient architectures. Instead of generating numerous possible candidate codewords and determining the most likely one as output codeword, our approach produces only one codeword by confining the degree of error location polynomial. Therefore, hardware complexity is significantly reduced by eliminating decision making unit. Moreover, an iteration-reduced RiBM algorithm is provided to enlarge the coding gain by using more least reliable positions (LRPs) in the limited operation latency. According to simulation results, our proposed soft RS (255, 239; 8) decoder with 5 LRPs outperforms 0.4 dB at 10-4 codeword error rate (CER) as compared to hard RS decoders. Implemented in standard CMOS 90 nm technology, the soft decoder chip can achieve 2.56 Gb/s throughput with similar complexity as a hard decoder. It can fit well for 10-40 Gb/s with 16 RS decoders in optical fiber systems and 2.5 Gb/s GPON applications.
KW - Error correction code
KW - Reed-Solomon (RS) code
KW - optical communication
UR - http://www.scopus.com/inward/record.url?scp=84903732474&partnerID=8YFLogxK
U2 - 10.1109/TCSI.2014.2298282
DO - 10.1109/TCSI.2014.2298282
M3 - Article
AN - SCOPUS:84903732474
SN - 1549-8328
VL - 61
SP - 2110
EP - 2118
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 7
M1 - 6731597
ER -