A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder

Chih Lung Chen; Yu Hsiang Lin; Hsie-Chia Chang; Chen-Yi Lee

A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder

Chih Lung Chen^*, Yu Hsiang Lin, Hsie-Chia Chang, Chen-Yi Lee

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Scopus citations

Abstract

In this paper, a (491, 3, 6) time-varying LDPC-CC decoder chip supporting five code-rates is implemented in 90nm CMOS technology. The decoder containing 5 processors occupies 2.24mm² and provides twice faster decoding convergence speed. Maximum throughput 2.37Gb/s is measured under 1.2V supply with a 0.024nJ/bit/proc energy efficiency.

Original language	English
Title of host publication	2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers
Pages	134-135
Number of pages	2
State	Published - 16 Sep 2011
Event	2011 Symposium on VLSI Circuits, VLSIC 2011 - Kyoto, Japan Duration: 15 Jun 2011 → 17 Jun 2011

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference	2011 Symposium on VLSI Circuits, VLSIC 2011
Country/Territory	Japan
City	Kyoto
Period	15/06/11 → 17/06/11

Keywords

high throughput
LDPC-CC

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Cite this

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title = "A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder",

abstract = "In this paper, a (491, 3, 6) time-varying LDPC-CC decoder chip supporting five code-rates is implemented in 90nm CMOS technology. The decoder containing 5 processors occupies 2.24mm2 and provides twice faster decoding convergence speed. Maximum throughput 2.37Gb/s is measured under 1.2V supply with a 0.024nJ/bit/proc energy efficiency.",

keywords = "high throughput, LDPC-CC",

author = "Chen, {Chih Lung} and Lin, {Yu Hsiang} and Hsie-Chia Chang and Chen-Yi Lee",

year = "2011",

month = sep,

day = "16",

language = "English",

isbn = "9784863481657",

series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",

pages = "134--135",

booktitle = "2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers",

note = "2011 Symposium on VLSI Circuits, VLSIC 2011 ; Conference date: 15-06-2011 Through 17-06-2011",

}

A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder. / Chen, Chih Lung; Lin, Yu Hsiang; Chang, Hsie-Chia et al.
2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers. 2011. p. 134-135 5986073 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder

AU - Chen, Chih Lung

AU - Lin, Yu Hsiang

AU - Chang, Hsie-Chia

AU - Lee, Chen-Yi

PY - 2011/9/16

Y1 - 2011/9/16

N2 - In this paper, a (491, 3, 6) time-varying LDPC-CC decoder chip supporting five code-rates is implemented in 90nm CMOS technology. The decoder containing 5 processors occupies 2.24mm2 and provides twice faster decoding convergence speed. Maximum throughput 2.37Gb/s is measured under 1.2V supply with a 0.024nJ/bit/proc energy efficiency.

AB - In this paper, a (491, 3, 6) time-varying LDPC-CC decoder chip supporting five code-rates is implemented in 90nm CMOS technology. The decoder containing 5 processors occupies 2.24mm2 and provides twice faster decoding convergence speed. Maximum throughput 2.37Gb/s is measured under 1.2V supply with a 0.024nJ/bit/proc energy efficiency.

KW - high throughput

KW - LDPC-CC

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M3 - Conference contribution

AN - SCOPUS:80052671264

SN - 9784863481657

T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers

SP - 134

EP - 135

BT - 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers

T2 - 2011 Symposium on VLSI Circuits, VLSIC 2011

Y2 - 15 June 2011 through 17 June 2011

ER -

A 2.37Gb/s 284.8mW rate-compatible (491,3,6) LDPC-CC decoder

Abstract

Publication series

Conference

Keywords

UN SDGs

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