A 19.1-dBm fully-integrated 24 GHz power amplifier using 0.18-μm CMOS technology

Jing Lin Kuo*, Zuo-Min Tsai , Huei Wang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

A 24 GHz, 19.1 dBm fully-integrated power amplifiers (PA) was designed and fabricated in the 0.18-μm deep n-well (DNW) CMOS technology. This power amplifier is a 2-stage design using cascode RF NMOS configuration and has a maximum measured output power of 19.1 dBm, an OP1dB of 13.3 dBm, a power added efficiency (PAE) of 15.6%, and a linear gain of 18.8 dB when V DD and DNW are both biased at 3.6 V. The chip size is only 0.56 × 0.58 mm2. To the author's knowledge, this PA demonstrates the highest output power of +19.1 dBm among the reported PAs above 15 GHz in CMOS processes.

Original languageEnglish
Title of host publicationProceedings of the 38th European Microwave Conference, EuMC 2008
Pages1425-1428
Number of pages4
DOIs
StatePublished - 1 Dec 2008
Event38th European Microwave Conference, EuMC 2008 - Amsterdam, Netherlands
Duration: 27 Oct 200831 Oct 2008

Publication series

NameProceedings of the 38th European Microwave Conference, EuMC 2008

Conference

Conference38th European Microwave Conference, EuMC 2008
Country/TerritoryNetherlands
CityAmsterdam
Period27/10/0831/10/08

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