@inproceedings{3750c3a78eb343ab9d96e2d7b31df167,
title = "A 188-Length Full Code Rate 333Mbps 1.08mm2 Radix-4 Hybrid-Trellis Turbo Decoder with Zero Patching for 3GPP LTE-A",
abstract = "Decoding high code rate Turbo codes by their reciprocal dual trellis has been shown to be potentially beneficial in implementation due to the simpler trellis structures. However, reciprocal dual trellis decoders' complexity grows significantly when the code rate is less than 1/2. Further, designing a multicode rate reciprocal dual trellis decoder is even more challenging if periodical puncturing patterns is not always available. In this paper, a radix-4 hybrid-trellis LTE-A turbo decoder with a controller switching between the conventional trellis and the reciprocal dual trellis is presented. To accommodate all the rates defined in LTE-A, a zero patching scheme is proposed to create the periodical puncturing patterns required by the reciprocal dual trellis decoding. The implementation of the proposed decoder supports all the code rates, from 1/3 to 0.95, and all the 188 block lengths. Fabricated in TSMC TN28HPM process, the post-layout simulations show the proposed decoder could achieve 333Mbps at 6 iterations under 263MHz operating frequency. The core area is 1.08 mm2, and the decoder draws 295.57 mW of power with energy efficiency of 0.148(nJ/bit/iter).",
author = "Chang, {Po Hsun} and Lin, {Chen Yang} and Sun, {Chia Hsiang} and Liao, {Yen Chin} and Hsie-Chia Chang",
year = "2018",
month = apr,
day = "26",
doi = "10.1109/ISCAS.2018.8351031",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings",
address = "United States",
note = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 ; Conference date: 27-05-2018 Through 30-05-2018",
}