A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology

Kai Yen Wang; Yun Lung Ho; Yu De Huang; Wai-Chi Fang

doi:10.1109/SiPS.2018.8598440

A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology

Kai Yen Wang, Yun Lung Ho, Yu De Huang, Wai-Chi Fang

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized real-time EEG processing system. The core area and total power consumption of the chip are respectively 1246∗1246μm2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for real-time data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.

Original language	English
Title of host publication	Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	269-274
Number of pages	6
ISBN (Electronic)	9781538663189
DOIs	https://doi.org/10.1109/SiPS.2018.8598440
State	Published - 31 Dec 2018
Event	2018 IEEE Workshop on Signal Processing Systems, SiPS 2018 - Cape Town, South Africa Duration: 21 Oct 2018 → 24 Oct 2018

Publication series

Name	IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Volume	2018-October
ISSN (Print)	1520-6130

Conference

Conference	2018 IEEE Workshop on Signal Processing Systems, SiPS 2018
Country/Territory	South Africa
City	Cape Town
Period	21/10/18 → 24/10/18

Keywords

CMOS 28nm tehnology
EEG signal processing
ORICA algorithm
Real Time EEG
de-artifact process

Access to Document

10.1109/SiPS.2018.8598440

Cite this

Wang, K. Y., Ho, Y. L., Huang, Y. D., & Fang, W.-C. (2018). A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018 (pp. 269-274). Article 8598440 (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation; Vol. 2018-October). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SiPS.2018.8598440

Wang, Kai Yen ; Ho, Yun Lung ; Huang, Yu De et al. / A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology. Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 269-274 (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation).

@inproceedings{054789d4d71949a1be262bd6de3ab5bc,

title = "A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology",

abstract = "In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized real-time EEG processing system. The core area and total power consumption of the chip are respectively 1246∗1246μm2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for real-time data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.",

keywords = "CMOS 28nm tehnology, EEG signal processing, ORICA algorithm, Real Time EEG, de-artifact process",

author = "Wang, {Kai Yen} and Ho, {Yun Lung} and Huang, {Yu De} and Wai-Chi Fang",

year = "2018",

month = dec,

day = "31",

doi = "10.1109/SiPS.2018.8598440",

language = "English",

series = "IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation",

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note = "2018 IEEE Workshop on Signal Processing Systems, SiPS 2018 ; Conference date: 21-10-2018 Through 24-10-2018",

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Wang, KY, Ho, YL, Huang, YD & Fang, W-C 2018, A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology. in Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018., 8598440, IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, vol. 2018-October, Institute of Electrical and Electronics Engineers Inc., pp. 269-274, 2018 IEEE Workshop on Signal Processing Systems, SiPS 2018, Cape Town, South Africa, 21/10/18. https://doi.org/10.1109/SiPS.2018.8598440

A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology. / Wang, Kai Yen; Ho, Yun Lung; Huang, Yu De et al.
Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 269-274 8598440 (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation; Vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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Y1 - 2018/12/31

N2 - In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized real-time EEG processing system. The core area and total power consumption of the chip are respectively 1246∗1246μm2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for real-time data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.

AB - In this paper, we propose a system-on-chip(SOC) design of highly effective multi-channel real-time EEG signal processing system based on Online-Recursive Independent Component Analysis (ORICA) algorithm implemented using TSMC's 28nm CMOS technology. In this chip, concepts of system-on-chip (SOC) design and effective system integration technique are well-combined together to realize a highly miniaturized real-time EEG processing system. The core area and total power consumption of the chip are respectively 1246∗1246μm2 and 25.03mW. The chip operations were validated by ADVANTEST V93000 PS1600 and the results obtained match with the software simulation. The average correlation coefficient between original source signals and extracted ORICA signals reaches 0.9572. Eye blink artifact, and facial muscle artifact will be removed automatically. Producing a pure EEG signal is beneficial for real-time data analysis; therefore, this chip design can enhance the reliability and feasibility of EEG-related applications, such as BCI, medical diagnosis and depth of anesthesia detection.

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KW - de-artifact process

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Wang KY, Ho YL, Huang YD, Fang WC. A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 269-274. 8598440. (IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation). doi: 10.1109/SiPS.2018.8598440

A 16 Channel Real-Time EEG Processing Based on ORICA Algorithm using 28nm CMOS Technology

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