@inproceedings{0692be5cea5742aba2ef459c5a4d3022,
title = "A 10-bit asynchronous SAR ADC with scalable conversion time in 0.18μm CMOS",
abstract = "In this paper, a 10b 100-to-500 kS/s asynchronous SAR ADC is proposed and prototyped in 0.18 μm CMOS. The supply voltage is scaled down appropriately for different sampling speeds to minimize the power consumption. At a 0.5-V supply voltage and a 100 kS/s sampling rate, the ADC achieves a signal-to-noise and distortion ratio of 56.35 dB and consumes 424 nW, resultin g in a figure of merit of 7.9 fJ/conversion-step. The ADC core occupies an active area of only 0.077 mm2.",
keywords = "Asynchronous, Low power, Low voltage, Metastability, SAR ADC",
author = "Tung, {Po Chiang} and Fan, {Duen Ting} and Tsai, {Tsung Heng}",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; null ; Conference date: 22-05-2016 Through 25-05-2016",
year = "2016",
month = jul,
day = "29",
doi = "10.1109/ISCAS.2016.7527531",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1454--1457",
booktitle = "ISCAS 2016 - IEEE International Symposium on Circuits and Systems",
address = "United States",
}