A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation

Xin Zhang; Yu Pu; Koichi Ishida; Yoshikatsu Ryu; Yasuyuki Okuma; Po-Hung Chen; Kazunori Watanabe; Takayasu Sakurai; Makoto Takamiya

doi:10.1109/TCSII.2012.2195056

A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation

Xin Zhang^*, Yu Pu, Koichi Ishida, Yoshikatsu Ryu, Yasuyuki Okuma, Po-Hung Chen, Kazunori Watanabe, Takayasu Sakurai, Makoto Takamiya

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to journal › Article › peer-review

10 Scopus citations

Abstract

A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.

Original language	English
Article number	6205614
Pages (from-to)	361-365
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems I: Regular Papers
Volume	59
Issue number	6
DOIs	https://doi.org/10.1109/TCSII.2012.2195056
State	Published - Jun 2012

Keywords

Offset canceling
pulse-density modulation (PDM)
switched capacitor (SC)
voltage converter
voltage reference

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10.1109/TCSII.2012.2195056

Cite this

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title = "A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation",

abstract = "A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.",

keywords = "Offset canceling, pulse-density modulation (PDM), switched capacitor (SC), voltage converter, voltage reference",

author = "Xin Zhang and Yu Pu and Koichi Ishida and Yoshikatsu Ryu and Yasuyuki Okuma and Po-Hung Chen and Kazunori Watanabe and Takayasu Sakurai and Makoto Takamiya",

year = "2012",

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doi = "10.1109/TCSII.2012.2195056",

language = "English",

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T1 - A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation

AU - Zhang, Xin

AU - Pu, Yu

AU - Ishida, Koichi

AU - Ryu, Yoshikatsu

AU - Okuma, Yasuyuki

AU - Chen, Po-Hung

AU - Watanabe, Kazunori

AU - Sakurai, Takayasu

AU - Takamiya, Makoto

PY - 2012/6

Y1 - 2012/6

N2 - A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.

AB - A 1-V-input 0.45-V-output switched-capacitor (SC) voltage converter with voltage-reference-free pulse-density modulation (VRF-PDM) is proposed. The all-digital VRF-PDM scheme improves the efficiency from 17% to 73% at 50- μA output current by reducing the pulse density and eliminating the voltage reference circuit. An output voltage trimming by the hot-carrier injection to a comparator and a periodic activation scheme of the SC voltage converter are also proposed to solve the problems attributed to VRF-PDM. The proposed voltage converter is fabricated in 65-nm CMOS and achieves an efficiency value of 73%-86% at 50 μ;A-10 mA output current range.

KW - Offset canceling

KW - pulse-density modulation (PDM)

KW - switched capacitor (SC)

KW - voltage converter

KW - voltage reference

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ER -

A 1-V-input switched-capacitor voltage converter with voltage-reference- free pulse-density modulation

Abstract

Keywords

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