65dBHD3 CMOS tunable OTA with mobility reduction compensation

Shih Tung Cheng; Wei Hsiu Chang; Chung-Chih Hung

doi:10.1109/VDAT.2011.5783547

65dBHD3 CMOS tunable OTA with mobility reduction compensation

Shih Tung Cheng^*, Wei Hsiu Chang, Chung-Chih Hung

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-V_pp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.

Original language	English
Title of host publication	Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
Pages	358-361
Number of pages	4
DOIs	https://doi.org/10.1109/VDAT.2011.5783547
State	Published - 2011
Event	2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 - Hsinchu, Taiwan Duration: 25 Apr 2011 → 28 Apr 2011

Publication series

Name	Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

Conference

Conference	2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011
Country/Territory	Taiwan
City	Hsinchu
Period	25/04/11 → 28/04/11

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10.1109/VDAT.2011.5783547

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Cheng, S. T., Chang, W. H., & Hung, C.-C. (2011). 65dBHD3 CMOS tunable OTA with mobility reduction compensation. In Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 (pp. 358-361). Article 5783547 (Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011). https://doi.org/10.1109/VDAT.2011.5783547

@inproceedings{7688a7fd1375414282d0a54e1768ca10,

title = "65dBHD3 CMOS tunable OTA with mobility reduction compensation",

abstract = "This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-Vpp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.",

author = "Cheng, {Shih Tung} and Chang, {Wei Hsiu} and Chung-Chih Hung",

year = "2011",

doi = "10.1109/VDAT.2011.5783547",

language = "English",

isbn = "9781424484997",

series = "Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011",

pages = "358--361",

booktitle = "Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011",

note = "2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011 ; Conference date: 25-04-2011 Through 28-04-2011",

}

Cheng, ST, Chang, WH & Hung, C-C 2011, 65dBHD3 CMOS tunable OTA with mobility reduction compensation. in Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011., 5783547, Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011, pp. 358-361, 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011, Hsinchu, Taiwan, 25/04/11. https://doi.org/10.1109/VDAT.2011.5783547

65dBHD3 CMOS tunable OTA with mobility reduction compensation. / Cheng, Shih Tung; Chang, Wei Hsiu; Hung, Chung-Chih.
Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011. 2011. p. 358-361 5783547 (Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - 65dBHD3 CMOS tunable OTA with mobility reduction compensation

AU - Cheng, Shih Tung

AU - Chang, Wei Hsiu

AU - Hung, Chung-Chih

PY - 2011

Y1 - 2011

N2 - This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-Vpp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.

AB - This paper presents a high linearity operational transconductance amplifier (OTA) base on the technique of mobility reduction compensation, which achieves great linearity improvement and has wide input range at low power consumption. The third-order harmonic distortion (HD3) of the OTA is about 65dB at 1MHz for a 1.2-Vpp differential input. The OTA was designed by the TSMC 0.18-μm CMOS process technology. For 1.8-V supply voltage, the static power consumption is only 0.427mW.

UR - http://www.scopus.com/inward/record.url?scp=79959511077&partnerID=8YFLogxK

U2 - 10.1109/VDAT.2011.5783547

DO - 10.1109/VDAT.2011.5783547

M3 - Conference contribution

AN - SCOPUS:79959511077

SN - 9781424484997

T3 - Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

SP - 358

EP - 361

BT - Proceedings of 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

T2 - 2011 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2011

Y2 - 25 April 2011 through 28 April 2011

ER -

65dBHD3 CMOS tunable OTA with mobility reduction compensation

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